Re: [v2,1/3] crypto: ppc/sha256 - assembler

On Fri, Jan 30, 2015 at 03:39:23PM +0100, Markus Stockhausen wrote:

This is the assembler code for SHA256 implementation with
the SIMD SPE instruction set. Although being only a 32 bit
architecture GPRs are extended to 64 bit presenting two
32 bit values. With the enhanced instruction set we can
operate on them in parallel. That helps reducing the time
to calculate W16-W64. For increasing performance even more 
the assembler function can compute hashes for more than 
one 64 byte input block. That saves a lot of register
saving/restoring

The state of the used SPE registers is preserved via the 
stack so we can run from interrupt context. There might 
be the case that we interrupt ourselves and push sensitive 
data from another context onto our stack. Clear this area
in the stack afterwards to avoid information leakage.

The code is endian independant.

Signed-off-by: Markus Stockhausen <redacted>

All applied.  Thanks!
-- 
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