Re: [PATCH v3 3/4] powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)

Hello Arnd,


Thanks for taking the time to review this

On 12/03/2014 01:42 PM, Arnd Bergmann wrote:

On Wednesday 03 December 2014 01:53:39 Emil Medve wrote:

quoted

On 12/02/2014 06:32 PM, Scott Wood wrote:

quoted

On Mon, 2014-12-01 at 04:02 -0600, Emil Medve wrote:

quoted

diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts
index 53761d4..431bf4e 100644
--- a/arch/powerpc/boot/dts/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/t4240rdb.dts

@@ -69,10 +69,27 @@
             device_type = "memory";
     };
 
+    reserved-memory {
+            #address-cells = <2>;
+            #size-cells = <2>;
+            ranges;
+
+            bman_fbpr: bman-fbpr {
+                    compatible = "fsl,bman-fbpr";
+                    alloc-ranges = <0 0 0xffff 0xffffffff>;
+                    size = <0 0x1000000>;
+                    alignment = <0 0x1000000>;
+            };
+    };

Can't this be done at the SoC level rather than board level?

The size of the memory is not SoC specific. Among other things is
determined by the number of MACs that are pinned-out on the board

Is this really a hardware property then, or some setting?

I'm unsure how to answer this. It is my opinion it's a hardware property
and that we're not stretching the intent of the reserved-memory binding

Also, if you use the name 'ranges', I would assume that the second
set of two cells is a length and should be <0 0 0x10000 0>.

Uh... Right. I'll fix it

Finally, you add a label here, so anything that is not board
specific could just stay in the per-soc file, with the board
specific properties added at teh board level.

I will do that


Cheers,