[V5 6/7] powerpc, ptrace: Enable support for miscellaneous debug registers
From: Anshuman Khandual <hidden>
Date: 2014-11-25 08:06:22
Also in:
lkml
Subsystem:
linux for powerpc (32-bit and 64-bit), ptrace support, the rest · Maintainers:
Madhavan Srinivasan, Michael Ellerman, Oleg Nesterov, Linus Torvalds
This patch enables get and set of miscellaneous debug registers through ptrace PTRACE_GETREGSET-PTRACE_SETREGSET interface by implementing new powerpc specific register set REGSET_MISC support corresponding to the new ELF core note NT_PPC_MISC added previously in this regard. Signed-off-by: Anshuman Khandual <redacted> --- arch/powerpc/include/uapi/asm/elf.h | 1 + arch/powerpc/kernel/ptrace.c | 123 ++++++++++++++++++++++++++++++++++++ 2 files changed, 124 insertions(+)
diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
index fdc8e2f..a41bd98 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h@@ -93,6 +93,7 @@ #define ELF_NFPREG 33 /* includes fpscr */ #define ELF_NVMX 34 /* includes all vector registers */ #define ELF_NTMSPRREG 7 /* includes TM sprs, org_msr, dscr, tar, ppr */ +#define ELF_NMISCREG 3 /* includes dscr, tar, ppr */ typedef unsigned long elf_greg_t64; typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index faa9058..61cc7ae 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c@@ -1324,6 +1324,114 @@ static int tm_cvmx_set(struct task_struct *target, } #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ +#ifdef CONFIG_PPC64 +/* + * get_misc_dbg + * + * This function gets miscellaneous debug registers + * which includes DSCR, PPR and TAR. + * + * Userspace intarface buffer layout: + * + * struct { + * unsigned long dscr; + * unsigned long ppr; + * unsigned long tar; + * }; + * + * The data element 'tar' will be valid only if the + * kernel has CONFIG_PPC_BOOK3S_64 config option enabled. + */ +static int get_misc_dbg(struct task_struct *target, + const struct user_regset *regset, unsigned int pos, + unsigned int count, void *kbuf, void __user *ubuf) +{ + int ret; + + /* Build test */ + BUILD_BUG_ON(TSO(dscr) + 2 * sizeof(unsigned long) != TSO(ppr)); + +#ifdef CONFIG_PPC_BOOK3S_64 + BUILD_BUG_ON(TSO(ppr) + sizeof(unsigned long) != TSO(tar)); +#endif + + /* DSCR register */ + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &target->thread.dscr, 0, + sizeof(unsigned long)); + + /* PPR register */ + if (!ret) + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &target->thread.ppr, + sizeof(unsigned long), + 2 * sizeof(unsigned long)); + +#ifdef CONFIG_PPC_BOOK3S_64 + /* TAR register */ + if (!ret) + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &target->thread.tar, + 2 * sizeof(unsigned long), + 3 * sizeof(unsigned long)); +#endif + return ret; +} + +/* + * set_misc_dbg + * + * This function sets miscellaneous debug registers + * which includes DSCR, PPR and TAR. + * + * Userspace intarface buffer layout: + * + * struct { + * unsigned long dscr; + * unsigned long ppr; + * unsigned long tar; + * }; + * + * The data element 'tar' will be valid only if the + * kernel has CONFIG_PPC_BOOK3S_64 config option enabled. + */ +static int set_misc_dbg(struct task_struct *target, + const struct user_regset *regset, unsigned int pos, + unsigned int count, const void *kbuf, + const void __user *ubuf) +{ + int ret; + + /* Build test */ + BUILD_BUG_ON(TSO(dscr) + 2 * sizeof(unsigned long) != TSO(ppr)); + +#ifdef CONFIG_PPC_BOOK3S_64 + BUILD_BUG_ON(TSO(ppr) + sizeof(unsigned long) != TSO(tar)); +#endif + + /* DSCR register */ + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.dscr, 0, + sizeof(unsigned long)); + + /* PPR register */ + if (!ret) + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.ppr, + sizeof(unsigned long), + 2 * sizeof(unsigned long)); +#ifdef CONFIG_PPC_BOOK3S_64 + /* TAR register */ + if (!ret) + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.tar, + 2 * sizeof(unsigned long), + 3 * sizeof(unsigned long)); +#endif + return ret; +} +#endif /* CONFIG_PPC64 */ + /* * These are our native regset flavors. */
@@ -1345,6 +1453,9 @@ enum powerpc_regset { REGSET_TM_CFPR, /* TM checkpointed FPR registers */ REGSET_TM_CVMX, /* TM checkpointed VMX registers */ #endif +#ifdef CONFIG_PPC64 + REGSET_MISC /* Miscellaneous debug registers */ +#endif }; static const struct user_regset native_regsets[] = {
@@ -1401,6 +1512,13 @@ static const struct user_regset native_regsets[] = { .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set }, #endif +#ifdef CONFIG_PPC64 + [REGSET_MISC] = { + .core_note_type = NT_PPC_MISC, .n = ELF_NMISCREG, + .size = sizeof(u64), .align = sizeof(u64), + .get = get_misc_dbg, .set = set_misc_dbg + }, +#endif }; static const struct user_regset_view user_ppc_native_view = {
@@ -1647,6 +1765,11 @@ static const struct user_regset compat_regsets[] = { .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set }, #endif + [REGSET_MISC] = { + .core_note_type = NT_PPC_MISC, .n = ELF_NMISCREG, + .size = sizeof(u64), .align = sizeof(u64), + .get = get_misc_dbg, .set = set_misc_dbg + }, }; static const struct user_regset_view user_ppc_compat_view = {
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1.9.3