Re: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

On 9/30/14 1:17 PM, "Scott Wood" [off-list ref] wrote:

On Tue, 2014-09-30 at 20:15 +0000, Jojy Varghese wrote:

quoted

=20
On 9/30/14 8:50 AM, "Guenter Roeck" [off-list ref] wrote:
=20

quoted

On Mon, Sep 29, 2014 at 06:31:06PM -0500, Scott Wood wrote:

quoted

Which specific chip and revision did you see this on?  What is the

value

quoted

quoted

in MCSR?
=20

Jojy can answer that, at least for P5020. We have seen it on P5040 as
well,
though, so it is not just limited to one chip/revision.

=20
The specifics are:
PVR: 0x80240012
Instruction that causes the MC exception: lwbrx
	The faulty load address is also present in RB. So we could change the
logic to use that
instead of DEAR. What I don=B9t know is of there are other cases also
which
escapes the current logic.

Could you find out what MCSR was when that happened?  I'm most
interested in whether MAV was set, but the other bits would be
interesting as well.

MCSR=3Da000 ( Load Error Report)

-Scott

Thanks
Jojy