A couple nits that don't necessarily warrant a respin:
On Tue, 2014-08-19 at 14:25 +0300, Laurentiu Tudor wrote:
Allocate msis such that each time a new
interrupt is requested, the SRS (MSIR
register select) to be used is allocated
in a round-robin fashion.
The end result is that the msi interrupts
will be spread across distinct MSIRs with
the main benefit that now users can set
affinity to each msi int through the mpic
irq backing up the MSIR register.
This is achieved with the help of a newly
introduced msi bitmap api that allows
specifying the starting point when
searching for a free msi interrupt.
Please wrap at around 60-70 columns.
+ } else {
+ off = (atomic_inc_return(&msi_data->msi_alloc_cnt) %
+ msi_data->msir_num);
+ off *= (1 << msi_data->srs_shift);
This is an unusual way to write "off <<= msi->data->srs_shift"...
-Scott