Thread (3 messages) 3 messages, 2 authors, 2014-02-24

Re: [PATCH] ppc476: Enable a linker work around for IBM errata #46

From: Alistair Popple <hidden>
Date: 2014-02-24 23:52:13

On Mon, 24 Feb 2014 08:35:06 Josh Boyer wrote:
On Mon, Feb 24, 2014 at 2:00 AM, Alistair Popple [off-list ref] 
wrote:
quoted
This patch adds an option to enable a work around for an icache bug on
476 that can cause execution of stale instructions when falling
through pages (IBM errata #46). It requires a recent version of
binutils which supports the --ppc476-workaround option.

The work around enables the appropriate linker options and ensures
that all module output sections are aligned to 4K page boundaries. The
work around is only required when building modules.
What happens if you're using 64K pages?  Is the alignment 4K always,
or does it need to be aligned to PAGE_SIZE?
The work around inserts an extra instruction on 4K page boundaries. As a 64K 
(or a 16K) page boundary is also a 4K page boundary the work around should 
cover those page sizes as well.

- Alistair
josh
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