On 31.01.2014, at 12:25, Aneesh Kumar K.V =
[off-list ref] wrote:

Alexander Graf [off-list ref] writes:
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quoted

On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:

quoted

Writing to IC is not allowed in the privileged mode.

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This is not a patch description.
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quoted

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Signed-off-by: Aneesh Kumar K.V <redacted>
---
 arch/powerpc/include/asm/kvm_host.h | 1 +
 arch/powerpc/kvm/book3s_emulate.c   | 3 +++
 arch/powerpc/kvm/book3s_pr.c        | 2 ++
 3 files changed, 6 insertions(+)
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diff --git a/arch/powerpc/include/asm/kvm_host.h =

b/arch/powerpc/include/asm/kvm_host.h

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quoted

index 9ebdd12e50a9..e0b13aca98e6 100644

--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h

@@ -509,6 +509,7 @@ struct kvm_vcpu_arch {
 	/* Time base value when we entered the guest */
 	u64 entry_tb;
 	u64 entry_vtb;
+	u64 entry_ic;
 	u32 tcr;
 	ulong tsr; /* we need to perform set/clr_bits() which requires =

ulong */

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quoted

 	u32 ivor[64];

diff --git a/arch/powerpc/kvm/book3s_emulate.c =

b/arch/powerpc/kvm/book3s_emulate.c

quoted

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index 4b58d8a90cb5..abe6f3057e5b 100644

--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c

@@ -531,6 +531,9 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu =

*vcpu, int sprn, ulong *spr_val

quoted

quoted

 	case SPRN_VTB:
 		*spr_val =3D vcpu->arch.vtb;
 		break;
+	case SPRN_IC:
+		*spr_val =3D vcpu->arch.ic;
+		break;
 	case SPRN_GQR0:
 	case SPRN_GQR1:
 	case SPRN_GQR2:

diff --git a/arch/powerpc/kvm/book3s_pr.c =

b/arch/powerpc/kvm/book3s_pr.c

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index b5598e9cdd09..51d469f8c9fd 100644

--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c

@@ -121,6 +121,7 @@ void kvmppc_copy_to_svcpu(struct =

kvmppc_book3s_shadow_vcpu *svcpu,

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 	 */
 	vcpu->arch.entry_tb =3D get_tb();
 	vcpu->arch.entry_vtb =3D get_vtb();
+	vcpu->arch.entry_ic =3D mfspr(SPRN_IC);

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Is this implemented on all systems?
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quoted

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 }
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@@ -174,6 +175,7 @@ out:
 	vcpu->arch.purr +=3D get_tb() - vcpu->arch.entry_tb;
 	vcpu->arch.spurr +=3D get_tb() - vcpu->arch.entry_tb;
 	vcpu->arch.vtb +=3D get_vtb() - vcpu->arch.entry_vtb;
+	vcpu->arch.ic +=3D mfspr(SPRN_IC) - vcpu->arch.entry_ic;

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This is getting quite convoluted. How about we act slightly more =

fuzzy=20

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and put all of this into vcpu_load/put?
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I am not sure whether vcpu_load/put is too early/late to save these
context ?

It'd mean we treat instruction emulation as part of guest overhead and =
time, but we'd make the entry/exit path faster. Unlike with HV KVM, =
guest entry/exit is pretty hot due to the massive amounts of instruction =
emulation we need to do.


Alex