Thread (2 messages) flat view 2 messages, 2 authors, 2014-01-17

Re: [PATCH] powerpc/pci: Fix IMMRBAR address

From: Kumar Gala <hidden>
Date: 2014-01-17 17:06:11

On Jan 16, 2014, at 2:14 AM, Minghuan Lian [off-list ref] =
wrote:
quoted hunk ↗ jump to hunk
For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
So when getting base address, these bits should be masked,
otherwise we may get incorrect base address.
=20
Signed-off-by: Minghuan Lian <redacted>
---
arch/powerpc/sysdev/fsl_pci.c | 8 ++++++++
1 file changed, 8 insertions(+)
=20
diff --git a/arch/powerpc/sysdev/fsl_pci.c =
b/arch/powerpc/sysdev/fsl_pci.c
quoted hunk ↗ jump to hunk
index 4dfd61d..44eae39 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -868,6 +868,14 @@ u64 fsl_pci_immrbar_base(struct pci_controller =
*hose)
=20
		pci_bus_read_config_dword(hose->bus,
			PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
+
+		/*
+		 * For PEXCSRBAR, bit 3-0 indicate prefetchable and
+		 * address type. So when getting base address, these
+		 * bits should be masked
+		 */
+		base &=3D 0xfffffff0;
+
base & PCI_BASE_ADDRESS_MEM_MASK
		return base;
	}
#endif
--=20
1.8.1.2
=20
=20
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help