Re: [PATCH v8] clk: corenet: Adds the clock binding

On Fri, 2014-01-10 at 10:29 +0800, Tang Yuantian wrote:

+- reg: Offset and length of the clock register set

"offset" into what?  The containing node is not within the scope of this
binding.

I know that plenty of other bindings are worded this way, and I wouldn't
hold up acceptance if this were the only issue, but it ought to be fixed
to say something like "reg: resource zero represents the clock register
set".

+Recommended properties:
+- clock-frequency: Input system clock frequency. Must be present
+	if the device has sub-nodes.

Why only "if the device has sub-nodes"?

+       * "fsl,qoriq-sysclk-1.0": for input system clock (v1.0).
+               It takes parent's clock as its clock.
+       * "fsl,qoriq-sysclk-2.0": for input system clock (v2.0).
+               It takes parent's clock as its clock.

s/parent's clock/parent's clock-frequency/ since the parent isn't
actually exposing a clock as per the clock bindings.

+Example for clock block and clock provider:
+/ {
+	clockgen: global-utilities@e1000 {
+		compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+		ranges = <0x0 0xe1000 0x1000>;
+		clock-frequency = <0>;

It'd be better to show a real clock-frequency here -- this is an example
for the node as the OS sees it, not what goes in the dts as an input to
U-Boot.

-Scott