Re: [PATCH 1/2] powerpc/dts: fix lbc lack of error interrupt
From: Mark Rutland <mark.rutland@arm.com>
Date: 2014-01-07 10:34:47
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On Tue, Jan 07, 2014 at 06:26:42AM +0000, Dongsheng Wang wrote:
quoted hunk
From: Wang Dongsheng <redacted> P1020, P1021, P1022, P1023 when the lbc get error, the error interrupt will be triggered. The corresponding interrupt is internal IRQ0. So system have to process the lbc IRQ0 interrupt. The corresponding lbc general interrupt is internal IRQ3. Signed-off-by: Wang Dongsheng <redacted>diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi index 68cc5e7..13f209f 100644 --- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi@@ -36,7 +36,8 @@ #address-cells = <2>; #size-cells = <1>; compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; + interrupts = <19 2 0 0 + 16 2 0 0>;
Minor nit: please bracket individual list elements like so:
interrupts = <19 2 0 0>,
<16 2 0 0>;
Otherwise this looks fine to me.
Thanks,
Mark.