Thread (3 messages) 3 messages, 3 authors, 2013-07-09

Re: [PATCH V2 2/2] powerpc/85xx: add the P1020RDB-PD DTS support

From: Scott Wood <hidden>
Date: 2013-07-08 17:10:38

On 07/04/2013 07:05:00 PM, Haijun Zhang wrote:
quoted hunk ↗ jump to hunk
diff --git a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi =20
b/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
index c952cd3..9d24501 100644
--- a/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/p1020rdb-pc.dtsi
@@ -131,9 +131,7 @@
 	};
=20
 	cpld@3,0 {
-		#address-cells =3D <1>;
-		#size-cells =3D <1>;
-		compatible =3D "cpld";
+		compatible =3D "fsl, p1020rdb-cpld";
No space after "fsl,".
+			partition@fs {
+				/* 4MB for Compressed RFS Image */
+				reg =3D <0x00500000 0x00400000>;
+				label =3D "file system";
+			};
+
+			partition@jffs-fs {
+				/* 7MB for JFFS2 based RFS */
+				reg =3D <0x00900000 0x00700000>;
+				label =3D "file system jffs2";
+			};
+		};
+		slic@0 {
+			compatible =3D "zarlink,le88266";
+			reg =3D <1>;
+			spi-max-frequency =3D <8000000>;
+		};
+		slic@1 {
+			compatible =3D "zarlink,le88266";
+			reg =3D <2>;
+			spi-max-frequency =3D <8000000>;
+		};
+
+	};
Remove that last blank line, and insert a blank line before each =20
"slic@..." (like you do between the partition nodes).
+	/* USB2 is shared with localbus, so it must be disabled
+	   by default. We can't put 'status =3D "disabled";' here
+	   since U-Boot doesn't clear the status property when
+	   it enables USB2. OTOH, U-Boot does create a new node
+	   when there isn't any. So, just comment it out.
+	*/
/*
  * Linux multi-line
  * comment style
  * is like this.
  */
+	usb@23000 {
+		status =3D "disabled";
+		phy_type =3D "ulpi";
+	};
Didn't you just say above that you can't use status =3D "disabled"?

And can U-Boot be fixed to set status =3D "disabled" on whichever I/O is =20
not usable?
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+	model =3D "fsl,P1020RDB-PD";
+	compatible =3D "fsl,P1020RDB-PD";
+
+	memory {
+		device_type =3D "memory";
+	};
+
+	lbc: localbus@ffe05000 {
+		reg =3D <0x0 0xffe05000 0x0 0x1000>;
+
+		/* NOR, NAND flash and L2 switch */
+		ranges =3D <0x0 0x0 0x0 0xec000000 0x04000000
+			  0x1 0x0 0x0 0xff800000 0x00040000
+			  0x2 0x0 0x0 0xffa00000 0x00020000
+			  0x3 0x0 0x0 0xffb00000 0x00020000>;
If you're going to have a comment here about what is mapped by the =20
ranges, why exclude the CPLD?

-Scott=
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