Thread (24 messages) 24 messages, 8 authors, 2013-08-02

Re: Inbound PCI and Memory Corruption

From: Peter LaDow <hidden>
Date: 2013-06-24 00:56:14


On Jun 22, 2013, at 5:00 PM, Benjamin Herrenschmidt <benh@kernel.crashing.or=
g> wrote:
On Fri, 2013-06-21 at 10:14 -0700, Peter LaDow wrote:
quoted
=20
Afaik e300 is slightly out of order, maybe it's missing a memory barrier
somewhere.... One thing to try is to add some to the dma_map/unmap ops.
=20
Also audit the driver to ensure that it properly uses barriers when
populating descriptors (and maybe compare to a more recent version of
the driver upstream).
Thanks for the tips.

I've been working with the folk at Intel on the e1000-dev list, and they did=
 add memory barriers. And I've tried the latest e1000 drivers (direct from t=
he e1000 tree) with no luck.

I've done PCI traces, and there is no DMA after the disable is written to th=
e e1000 part. All I can think is that there may be posted writes, the kernel=
 goes on to cleanup the DMA buffers. But there are write memory barriers, so=
 I don't see how this is possible.

Are the memory barriers meaningful in single processor builds?

Thanks,
Pete=
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