[PATCH 17/31] powerpc/eeh: I/O chip post initialization
From: Gavin Shan <hidden>
Date: 2013-06-18 08:35:15
Subsystem:
linux for powerpc (32-bit and 64-bit), pci enhanced error handling (eeh) for powerpc, the rest · Maintainers:
Madhavan Srinivasan, Mahesh J Salgaonkar, Linus Torvalds
The post initialization (struct eeh_ops::post_init) is called after the EEH probe is done. On the other hand, the EEH core post initialization is designed to call platform and then I/O chip backend on PowerNV platform. The patch adds the backend for I/O chip to notify the platform that the specific PHB is ready to supply EEH service. Signed-off-by: Gavin Shan <redacted> --- arch/powerpc/platforms/powernv/eeh-ioda.c | 21 ++++++++++++++++++++- 1 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index f12e888..7b27241 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c@@ -34,8 +34,27 @@ #include "powernv.h" #include "pci.h" +/** + * ioda_eeh_post_init - Chip dependent post initialization + * @hose: PCI controller + * + * The function will be called after eeh PEs and devices + * have been built. That means the EEH is ready to supply + * service with I/O cache. + */ +static int ioda_eeh_post_init(struct pci_controller *hose) +{ + struct pnv_phb *phb = hose->private_data; + + /* FIXME: Enable it for PHB3 later */ + if (phb->type == PNV_PHB_IODA1) + phb->eeh_enabled = 1; + + return 0; +} + struct pnv_eeh_ops ioda_eeh_ops = { - .post_init = NULL, + .post_init = ioda_eeh_post_init, .set_option = NULL, .get_state = NULL, .reset = NULL,
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1.7.5.4