RE: [PATCH 2/3 v2] iommu/fsl: Add iommu domain attributes required by fsl PAMU driver.

-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org]
Sent: Thursday, October 04, 2012 6:47 PM
To: Sethi Varun-B16395
Cc: joerg.roedel@amd.com; iommu@lists.linux-foundation.org; linuxppc-
dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; Sethi Varun-B16395
Subject: Re: [PATCH 2/3 v2] iommu/fsl: Add iommu domain attributes
required by fsl PAMU driver.
=20
=20
On Oct 4, 2012, at 6:56 AM, [off-list ref] [off-list ref]
wrote:
=20

quoted

From: Varun Sethi <redacted>

Added the following domain attributes required by FSL PAMU driver:
1. Subwindows field added to the iommu domain geometry attribute.
2. Added new iommu stash attribute, which allows setting of the
  LIODN specific stash id parameter through IOMMU API.
3. Added an attribute for enabling/disabling DMA to a particular
  memory window.

Signed-off-by: Varun Sethi <redacted>
---
include/linux/iommu.h |   35 +++++++++++++++++++++++++++++++++++
1 files changed, 35 insertions(+), 0 deletions(-)

diff --git a/include/linux/iommu.h b/include/linux/iommu.h index

f3b99e1..62e22f0 100644

--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h

@@ -44,6 +44,33 @@ struct iommu_domain_geometry {

	dma_addr_t aperture_start; /* First address that can be mapped

*/

quoted

	dma_addr_t aperture_end;   /* Last address that can be mapped

*/

quoted

	bool force_aperture;       /* DMA only allowed in mappable range?

*/

quoted

+
+	/* The subwindows field indicates number of DMA subwindows

supported

quoted

+	 * by the geometry. Following is the interpretation of
+	 * values for this field:
+	 * 0 : This implies that the supported geometry size is 1 MB
+         * with each subwindow size being 4KB. Thus number of

subwindows

quoted

+	 * being =3D 1MB/4KB =3D 256.
+	 * 1 : Only one DMA window i.e. no subwindows.
+	 * value other than 0 or 1 would indicate actual number of

subwindows.

quoted

+	 */
+	u32 subwindows;
+};
+
+/* cache stash targets */
+#define L1_CACHE 1
+#define L2_CACHE 2
+#define L3_CACHE 3

=20
These names are way to generic for being exposed to user space

Will fix naming to IOMMU_ATTR_CACHE_L1 etc.

-Varun