On 09/10/2012 07:52 AM, Aneesh Kumar K.V wrote:

From: "Aneesh Kumar K.V" <redacted>

Increase max addressable range to 64TB. This is not tested on
real hardware yet.

Reviewed-by: Paul Mackerras <redacted>
Signed-off-by: Aneesh Kumar K.V <redacted>
---
 arch/powerpc/include/asm/mmu-hash64.h        |   42 ++++++++++++++++++++------
 arch/powerpc/include/asm/pgtable-ppc64-4k.h  |    2 +-
 arch/powerpc/include/asm/pgtable-ppc64-64k.h |    2 +-
 arch/powerpc/include/asm/processor.h         |    4 +--
 arch/powerpc/include/asm/sparsemem.h         |    4 +--
 arch/powerpc/kernel/exceptions-64s.S         |    4 ++-
 arch/powerpc/mm/slb_low.S                    |   12 ++++++++
 7 files changed, 54 insertions(+), 16 deletions(-)

Bisect shows this patch to be the one that causes hangs on p5020.  It
gets stuck in a loop of TLB misses, bailing on a PUD entry of zero.  The
page fault path runs and returns, but doesn't fix the situation, so it
repeats.  AFAICT the miss handler is behaving correctly.  I'll try to
see what's going on in the page fault code.

-Scott