RE: [PATCH V10] powerpc/fsl-pci: Unify pci/pcie initialization code
flat view
From: Jia Hongtao-B38951 <hidden>
Date: 2012-09-11 04:49:54
Hi Kumar,=0A= =0A= Do you or Ben has any comment on this?=0A= Please let me know.=0A= =0A= Thanks.=0A= =0A= ________________________________________=0A= From: Jia Hongtao-B38951=0A= Sent: Friday, August 31, 2012 10:25 AM=0A= To: Kumar Gala=0A= Cc: linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Wood Scott-B07421=0A= Subject: RE: [PATCH V10] powerpc/fsl-pci: Unify pci/pcie initialization cod= e=0A= =0A=
-----Original Message-----=0A= From: Kumar Gala [mailto:galak@kernel.crashing.org]=0A= Sent: Friday, August 31, 2012 12:54 AM=0A= To: Jia Hongtao-B38951=0A= Cc: linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Wood Scott-B07421=0A= Subject: Re: [PATCH V10] powerpc/fsl-pci: Unify pci/pcie initialization=
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code=0A= =0A= =0A= On Aug 28, 2012, at 2:44 AM, Jia Hongtao wrote:=0A= =0A=quoted
We unified the Freescale pci/pcie initialization by changing the=0A= fsl_pci to a platform driver. In previous PCI code architecture the=0A= initialization routine is called at board_setup_arch stage. Now the=0A= initialization is done in probe function which is architectural=0A= better. Also It's convenient for adding PM support for PCI controller=
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in later patch.=0A=quoted
=0A= Now we registered pci controllers as platform devices. So we combine=0A= two initialization code as one platform driver.=0A= =0A= Signed-off-by: Jia Hongtao <redacted>=0A= Signed-off-by: Li Yang <redacted>=0A= Signed-off-by: Chunhe Lan <redacted>=0A= ---=0A= Changes for V10:=0A= * Just update comments for mpc85xx_cds_pci_assign_primary=0A==0A= What do we have to say w/regards to Ben's comment about breaking of=0A= pci_fixup_final by moving to a platform driver?=0A= =0A= - k=0A=
=0A= If Ben mean the fixup order I have already gave some explanations as follow= :=0A= =0A= I have already done some investigations and the sequence of fixup=0A= (including early, header, final) will not be changed in platform driver.=0A= =0A= We register and init PCI controllers as platform devices at arch_initcall= =0A= stage and PCI scanning (pcibios_init) is at subsys_initcall stage in which= =0A= early and header fixup will be done in right sequence. The final fixup will= =0A= be start at rootfs_initcall stage which is later than early and header fixu= p.=0A= =0A= - Hongtao.=0A=