RE: [PATCH] [v2] sata_fsl: add workaround for data length mismatch on freescale V2 controller

quoted

  	hstatus =3D ioread32(hcr_base + HSTATUS);

  	sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError);

+	/* Read command completed register */
+	done_mask =3D ioread32(hcr_base + CC);
+
+	/* Workaround for data length mismatch errata */
+	if (unlikely(hstatus & INT_ON_DATA_LENGTH_MISMATCH)) {
+		for (tag =3D 0; tag < ATA_MAX_QUEUE; tag++) {
+			qc =3D ata_qc_from_tag(ap, tag);
+			if (qc && ata_is_atapi(qc->tf.protocol)) {
+				u32 Hcontrol;

=20
    No uppercase in variable names please.=20

[S.H] OK.

Besides, you have 'hstatus'

variable already and that would be inconsistent.

[S.H] Yes, but I ignored fatal error and device error, so this won't be an =
issue.

=20

quoted

+#define HCONTROL_CLEAR_ERROR	(1 << 27)
+				/* Set HControl[27] to clear error registers */
+				Hcontrol =3D ioread32(hcr_base + HCONTROL);
+				iowrite32(Hcontrol | HCONTROL_CLEAR_ERROR,
+						hcr_base + HCONTROL);
+
+				/* Clear HControl[27] */
+				iowrite32(Hcontrol & (~HCONTROL_CLEAR_ERROR),

=20
    Parens not needed around ~HCONTROL_CLEAR_ERROR.

[S.H] OK.


Best Regards,=20
Shaohui Xie