v1 -> v2:
* Shorten the varaible names so that they looks more short.
* Changelog adjustment so that they looks more meaningful.
v2 -> v3:
* Rebase to 3.5.RC4
v3 -> v4:
* Merge Yinghai's patches.
v3 -> v4:
* Split patch for easy review.
* Add function to retrieve the minimal alignment of p2p bridge.
Lu Yinghai(3):
pci: change variable name for find_pci_host_bridge
pci: argument pci_bus for find_pci_host_bridge
pci: fiddle with conversion of pci and CPU address
Gavin Shan(4)
pci: make find_pci_host_bridge global
pci: minimal alignment for bars of P2P bridges
pci: function to retrieve alignment of p2p bars
pci: resource assignment based on p2p alignment
drivers/pci/host-bridge.c | 59 ++++++++++++++++++++++++++++++++++++---------
drivers/pci/probe.c | 5 ++++
drivers/pci/setup-bus.c | 22 +++++++++++------
include/linux/pci.h | 15 +++++++++++-
4 files changed, 81 insertions(+), 20 deletions(-)
Thanks,
Gavin
The patch makes function find_pci_host_bridge() global so that the
platforms (e.g. PPC) can access pci_host_bridge.
Signed-off-by: Gavin Shan <redacted>
---
drivers/pci/host-bridge.c | 2 +-
include/linux/pci.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
The patch fiddles with the those functions used to do conversion
between PCI and CPU address. More specificly, 2 functions are
involved: pcibios_bus_to_resource() and pcibios_resource_to_bus()
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Gavin Shan <redacted>
---
drivers/pci/host-bridge.c | 24 +++++++++++++++++++-----
include/linux/pci.h | 5 ++++-
2 files changed, 23 insertions(+), 6 deletions(-)
The patch changes function pbus_size_io() and pbus_size_mem() to
do resource (I/O, memory and prefetchable memory) reassignment
based on the minimal alignments from the p2p bridge.
Signed-off-by: Gavin Shan <redacted>
---
drivers/pci/setup-bus.c | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)
The patch changes the variable name for function find_pci_host_bridge()
so that it looks more meaningful. More specificly, the "bus" has been
replaced with "root_bus".
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Gavin Shan <redacted>
---
drivers/pci/host-bridge.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
On some powerpc platforms, device BARs need to be assigned to separate
"segments" of the address space in order for the error isolation and HW
virtualization mechanisms (EEH) to work properly. Those "segments" have
a minimum size that can be fairly large (16M). In order to be able to
use the generic resource assignment code rather than re-inventing our
own, we chose to group devices by bus. That way, a simple change of the
minimum alignment requirements of resources assigned to PCI to PCI (P2P)
bridges is enough to ensure that all BARs for devices below those bridges
will fit into contiguous sets of segments and there will be no overlap.
This patch provides a way for the host bridge to override the default
alignment values used by the resource allocation code for that purpose.
Signed-off-by: Gavin Shan <redacted>
Reviewed-by: Ram Pai <redacted>
Reviewed-by: Richard Yang <redacted>
---
drivers/pci/probe.c | 5 +++++
include/linux/pci.h | 8 ++++++++
2 files changed, 13 insertions(+)
The patch introduces function pci_align_boundary() to retrieve the
minimal alignment of p2p bars according to the argument.
Signed-off-by: Gavin Shan <redacted>
---
drivers/pci/host-bridge.c | 24 ++++++++++++++++++++++++
include/linux/pci.h | 1 +
2 files changed, 25 insertions(+)
Hi Bjorn,
Could you please review it when you have time?
Thanks,
Gavin
v1 -> v2:
* Shorten the varaible names so that they looks more short.
* Changelog adjustment so that they looks more meaningful.
v2 -> v3:
* Rebase to 3.5.RC4
v3 -> v4:
* Merge Yinghai's patches.
v3 -> v4:
* Split patch for easy review.
* Add function to retrieve the minimal alignment of p2p bridge.
Lu Yinghai(3):
pci: change variable name for find_pci_host_bridge
pci: argument pci_bus for find_pci_host_bridge
pci: fiddle with conversion of pci and CPU address
Gavin Shan(4)
pci: make find_pci_host_bridge global
pci: minimal alignment for bars of P2P bridges
pci: function to retrieve alignment of p2p bars
pci: resource assignment based on p2p alignment
drivers/pci/host-bridge.c | 59 ++++++++++++++++++++++++++++++++++++---------
drivers/pci/probe.c | 5 ++++
drivers/pci/setup-bus.c | 22 +++++++++++------
include/linux/pci.h | 15 +++++++++++-
4 files changed, 81 insertions(+), 20 deletions(-)
Thanks,
Gavin
On Fri, Jun 29, 2012 at 02:47:48PM +0800, Gavin Shan wrote:
On some powerpc platforms, device BARs need to be assigned to separate
"segments" of the address space in order for the error isolation and HW
virtualization mechanisms (EEH) to work properly. Those "segments" have
a minimum size that can be fairly large (16M). In order to be able to
use the generic resource assignment code rather than re-inventing our
own, we chose to group devices by bus. That way, a simple change of the
minimum alignment requirements of resources assigned to PCI to PCI (P2P)
bridges is enough to ensure that all BARs for devices below those bridges
will fit into contiguous sets of segments and there will be no overlap.
If I understand correctly, you might have something like this:
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0xc0000000-0xcfffffff]
0000:00:01.0: PCI bridge to [bus 10-1f]
0000:00:01.0: bridge window [mem 0xc1000000-0xc1ffffff]
0000:00:02.0: PCI bridge to [bus 20-2f]
0000:00:02.0: bridge window [mem 0xc2000000-0xc2ffffff]
where everything under bridge 00:01.0 is in one EEH segment, and
everything under 00:02.0 is in another. In this case, each EEH
segment is 16MB.
I think your proposal is basically that when we add up resources required
below the P2P bridges, we round up to the default 1MB (the minimum P2P
bridge memory aperture size per spec) *or* to a larger value, e.g., 16MB,
if the architecture requires it.
That makes sense to me, but I have some implementation questions.
Your patches make the required alignment a property of the host bridge.
But don't you want to do this rounding up only at certain levels of the
hierarchy? For example, what if you had another P2P bridge:
0000:10:01.0: PCI bridge to [bus 18-1f]
I assume the devices on bus 0000:18 would still be in the first EEH
segment, and you wouldn't necessarily want to round up the 10:01.0
apertures to 16MB.
Maybe there should be an interface like this:
resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
unsigned long type)
{
if (type & IORESOURCE_MEM)
return 1024*1024; /* mem windows must be 1MB aligned */
if (bus->self->io_window_1k)
return 1024;
return 4*1024; /* I/O windows default to 4K alignment */
}
that the arch could override? Then you could return the 16MB alignment
for the top-level P2P bridge leading to an EEH segment, and use the
default alignment for P2P bridges *inside* the segment.
quoted hunk
This patch provides a way for the host bridge to override the default
alignment values used by the resource allocation code for that purpose.
Signed-off-by: Gavin Shan <redacted>
Reviewed-by: Ram Pai <redacted>
Reviewed-by: Richard Yang <redacted>
---
drivers/pci/probe.c | 5 +++++
include/linux/pci.h | 8 ++++++++
2 files changed, 13 insertions(+)
On Mon, Jul 16, 2012 at 11:30:23PM +0800, Gavin Shan wrote:
v1 -> v2:
* Shorten the varaible names so that they looks more short.
* Changelog adjustment so that they looks more meaningful.
v2 -> v3:
* Rebase to 3.5.RC4
v3 -> v4:
* Merge Yinghai's patches.
v3 -> v4:
* Split patch for easy review.
* Add function to retrieve the minimal alignment of p2p bridge.
v4 -> v5:
* Rebase to 3.5.RC7
* Introduce weak function pcibios_window_alignment() to retrieve
I/O and memory alignment for P2P bridges.
* Introduce pcibios_window_alignment() for ppc to override the
PCI function.
* Add ppc_md.pcibios_window_alignment() for specific platform like
powernv can override ppc's pcibios_window_alignment().
You don't have to rebase your patches -- I can take care of merging
them with previous patches I've applied -- but if you *do* rebase,
the most convenient target would be my "next" branch, since it
already contains the things I would have to merge with.
Lu Yinghai(3):
pci: change variable name for find_pci_host_bridge
pci: argument pci_bus for find_pci_host_bridge
pci: fiddle with conversion of pci and CPU address
I think the above patches are not needed for the ones below, are they?