On Mon, 2012-01-16 at 13:36 -0600, Scott Wood wrote:
On 01/16/2012 01:00 AM, Xu Jiucheng wrote:
quoted
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <3 1>;
+ reg = <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <2 1>;
+ reg = <0x1>;
+ };
pq3-mpic.dtsi (included by p1021si-post.dtsi) uses 4-cell interrupt
specifiers, so they need to be used everywhere.
-Scott
ok.
Thanks,
Jiucheng