Re: [PATCH] powerpc: Decode correct MSR bits in oops output
From: Kumar Gala <hidden>
Date: 2011-11-28 16:04:27
On Nov 24, 2011, at 11:35 PM, Anton Blanchard wrote:
=20 On a 64bit book3s machine I have an oops from a system reset that claims the book3e CE bit was set: =20 MSR: 8000000000021032 <ME,CE,IR,DR> CR: 24004082 XER: 00000010 =20 On a book3s machine system reset sets IBM bit 46 and 47 depending on the power saving mode. Separate the definitions by type and for completeness add the rest of the bits in. =20 Signed-off-by: Anton Blanchard <redacted> --- =20 Index: linux-build/arch/powerpc/kernel/process.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
quoted hunk ↗ jump to hunk
--- linux-build.orig/arch/powerpc/kernel/process.c 2011-11-25 =
13:22:24.294919094 +1100
quoted hunk ↗ jump to hunk
+++ linux-build/arch/powerpc/kernel/process.c 2011-11-25 =
13:36:23.213834524 +1100
quoted hunk ↗ jump to hunk
@@ -584,16 +584,32 @@ static struct regbit {unsigned long bit; const char *name; } msr_bits[] =3D { +#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE) + {MSR_SF, "SF"}, + {MSR_HV, "HV"}, +#endif + {MSR_VEC, "VEC"}, + {MSR_VSX, "VSX"}, +#ifdef CONFIG_BOOKE + {MSR_CE, "CE"}, +#endif {MSR_EE, "EE"}, {MSR_PR, "PR"}, {MSR_FP, "FP"}, - {MSR_VEC, "VEC"}, - {MSR_VSX, "VSX"}, {MSR_ME, "ME"}, - {MSR_CE, "CE"}, +#ifdef CONFIG_BOOKE {MSR_DE, "DE"}, +#else + {MSR_SE, "SE"}, + {MSR_BE, "BE"}, +#endif {MSR_IR, "IR"}, {MSR_DR, "DR"}, + {MSR_PMM, "PMM"}, +#ifndef CONFIG_BOOKE + {MSR_RI, "RI"},
We have 'RI' on some BOOKE so lets allow for it to be decoded
+ {MSR_LE, "LE"},
+#endif
{0, NULL}
};Since you're fixing this can you add the following for CONFIG_BOOKE: MSR_GS, MSR_UCLE, MSR_PMM, MSR_CM - k=