[PATCH] P1021: set IReady in QE Microcode Upload

Hi,

QE Microcode Initialization using qe_upload_microcode() does not work on P1=
021 if the IRAM-Ready register is not set after the microcode upload. This =
patch adds a definition for the "I-RAM Ready" register and sets it uppon mi=
crocode upload completion.


Signed-off-by: Ioannis Kokkoris <redacted>


diff -Nru a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/=
immap_qe.h

--- a/arch/powerpc/include/asm/immap_qe.h	2011-11-11 17:47:45.000000000 +02=

00

+++ b/arch/powerpc/include/asm/immap_qe.h	2011-11-11 17:49:31.000000000 +02=

00

@@ -26,7 +26,9 @@
 struct qe_iram {
 	__be32	iadd;		/* I-RAM Address Register */
 	__be32	idata;		/* I-RAM Data Register */
-	u8	res0[0x78];
+	u8	res0[0x04];
+	__be32	iready;		/* I-RAM Ready Register */
+	u8	res1[0x70];
 } __attribute__ ((packed));

=20
 /* QE Interrupt Controller */
diff -Nru a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h

--- a/arch/powerpc/include/asm/qe.h	2011-11-11 17:47:57.000000000 +0200
+++ b/arch/powerpc/include/asm/qe.h	2011-11-11 17:49:42.000000000 +0200

@@ -499,6 +499,7 @@
 /* I-RAM */
 #define QE_IRAM_IADD_AIE	0x80000000	/* Auto Increment Enable */
 #define QE_IRAM_IADD_BADDR	0x00080000	/* Base Address */
+#define QE_IRAM_READY           0x80000000      /* Ready */

=20
 /* UPC */
 #define UPGCR_PROTOCOL	0x80000000	/* protocol ul2 or pl2 */
diff -Nru a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe=
.c

--- a/arch/powerpc/sysdev/qe_lib/qe.c	2011-11-11 17:48:44.000000000 +0200
+++ b/arch/powerpc/sysdev/qe_lib/qe.c	2011-11-11 17:49:59.000000000 +0200

@@ -377,6 +377,9 @@

=20
 	for (i =3D 0; i < be32_to_cpu(ucode->count); i++)
 		out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
+=09
+	/* Set I-RAM Ready Register */=09
+	out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));
 }
=20
 /*
--

Best Regards,
Ioannis

Kokoris, Ioannis wrote:

Hi,

QE Microcode Initialization using qe_upload_microcode() does not work
on P1021 if the IRAM-Ready register is not set after the microcode
upload. This patch adds a definition for the "I-RAM Ready" register and
sets it uppon microcode upload completion.

Will this code still work on other QE parts, like the MPC8323?

--=20
Timur Tabi
Linux kernel developer at Freescale=

Kokoris, Ioannis wrote:

quoted

Hi,

QE Microcode Initialization using qe_upload_microcode() does not work
on P1021 if the IRAM-Ready register is not set after the microcode
upload. This patch adds a definition for the "I-RAM Ready" register and
sets it uppon microcode upload completion.

Will this code still work on other QE parts, like the MPC8323?

Ready register is needed for ROM-less devices such as P1021, MPC859, MPC830=
6 etc.=20
For ROM-based devices such as MCP8323 the Ready register does not exist.
Is there a global definition for conditionally including this code?

Regards,
Ioannis

On Mon, Nov 14, 2011 at 2:55 AM, Kokoris, Ioannis
[off-list ref] wrote:

Ready register is needed for ROM-less devices such as P1021, MPC859, MPC8=

306 etc.

For ROM-based devices such as MCP8323 the Ready register does not exist.
Is there a global definition for conditionally including this code?

I'll have to check.  But this patch can't be applied as-is unless it's
proven safe for all QE-enabled chips.

--=20
Timur Tabi
Linux kernel developer at Freescale=

On Nov 15, 2011, at 9:02 PM, Tabi Timur-B04825 wrote:

On Mon, Nov 14, 2011 at 2:55 AM, Kokoris, Ioannis
[off-list ref] wrote:

quoted

Ready register is needed for ROM-less devices such as P1021, MPC859, =

MPC8306 etc.

quoted

For ROM-based devices such as MCP8323 the Ready register does not =

exist.

quoted

Is there a global definition for conditionally including this code?

=20
I'll have to check.  But this patch can't be applied as-is unless it's
proven safe for all QE-enabled chips.

Any update on trying this on a MPC8323?

- k=

On Nov 24, 2011, at 1:55 AM, Kumar Gala [off-list ref] wrote:

quoted

=20
I'll have to check.  But this patch can't be applied as-is unless it's
proven safe for all QE-enabled chips.

=20
Any update on trying this on a MPC8323?

Haiying said it should be ok, but I haven't tried it yet.  I'll try it on M=
onday.

On Nov 24, 2011, at 7:57 AM, Tabi Timur-B04825 wrote:

On Nov 24, 2011, at 1:55 AM, Kumar Gala [off-list ref] =

wrote:

=20

quoted

quoted

=20
I'll have to check.  But this patch can't be applied as-is unless =

it's

quoted

quoted

proven safe for all QE-enabled chips.

=20
Any update on trying this on a MPC8323?

=20
Haiying said it should be ok, but I haven't tried it yet.  I'll try it =

on Monday.

Did you ever test this?

- k=

Kumar Gala wrote:

quoted

quoted

Haiying said it should be ok, but I haven't tried it yet.  I'll try it on Monday.

Did you ever test this?

No, I forgot all about it.  I'll try it today, assuming the lone 8323
board in the board farm still works.

-- 
Timur Tabi
Linux kernel developer at Freescale

On Mar 16, 2012, at 11:07 AM, Timur Tabi wrote:

Kumar Gala wrote:

quoted

quoted

quoted

Haiying said it should be ok, but I haven't tried it yet.  I'll try =

it on Monday.

=20

quoted

Did you ever test this?

=20
No, I forgot all about it.  I'll try it today, assuming the lone 8323
board in the board farm still works.

Do you remember if you ever tested this?

- k=

Kumar Gala wrote:

On Mar 16, 2012, at 11:07 AM, Timur Tabi wrote:

quoted

Kumar Gala wrote:

quoted

quoted

quoted

Haiying said it should be ok, but I haven't tried it yet.  I'll try it on Monday.

quoted

Did you ever test this?

No, I forgot all about it.  I'll try it today, assuming the lone 8323
board in the board farm still works.

Do you remember if you ever tested this?

No, I forgot again.  Ugh, sorry.  I'll do it now.

-- 
Timur Tabi
Linux kernel developer at Freescale

Kumar Gala wrote:

quoted

quoted

No, I forgot all about it.  I'll try it today, assuming the lone 8323
board in the board farm still works.

Do you remember if you ever tested this?

Well, I tried to test it.  We have an 83xx board that has a QE UART that
needs firmware uploaded, but I don't know how to connect that QE to an
actual RS232 port.  It needs a riser which I don't think we have.

I can verify that the QE UART driver does not hang which this patch, and
that it appears to still be sending data, but I have no way of knowing for
sure.

-- 
Timur Tabi
Linux kernel developer at Freescale

On Nov 11, 2011, at 10:05 AM, Kokoris, Ioannis wrote:

Hi,
=20
QE Microcode Initialization using qe_upload_microcode() does not work =

on P1021 if the IRAM-Ready register is not set after the microcode =
upload. This patch adds a definition for the "I-RAM Ready" register and =
sets it uppon microcode upload completion.

=20
=20
Signed-off-by: Ioannis Kokkoris =

[off-list ref]

=20

applied to next

- k=