[PATCH 1/5] powerpc/85xx: issue 15 EOI after core reset

This is listed as a requirement after issuing a core reset to
properly clear pending interrupts

Signed-off-by: Matthew McClintock <redacted>
---
 arch/powerpc/sysdev/mpic.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9678081..f5b83f0 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c

@@ -1748,6 +1748,7 @@ void mpic_reset_core(int cpu)
 	struct mpic *mpic = mpic_primary;
 	u32 pir;
 	int cpuid = get_hard_smp_processor_id(cpu);
+	int i;
 
 	/* Set target bit for core reset */
 	pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

@@ -1759,6 +1760,12 @@ void mpic_reset_core(int cpu)
 	pir &= ~(1 << cpuid);
 	mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);
 	mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
+
+	/* Perform 15 EOI on each reset core to clear pending interrupts */
+	for (i = 0; i < 15; i++) {
+		_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
+				      MPIC_CPU_EOI, 0);
+	}
 }
 #endif /* CONFIG_SMP */
 

-- 
1.7.6.1

Fix typo in comments introduced by:

commit 6dece0eb69b2a28e18d104bc5d707f1cb673f5e0
Author: Scott Wood [off-list ref]
Date:   Mon Jul 25 11:29:33 2011 +0000

    powerpc/32: Pass device tree address as u64 to machine_init

Signed-off-by: Matthew McClintock <redacted>
cc: Scott Wood <redacted>
---
 arch/powerpc/kernel/head_fsl_booke.S |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index e1c699f..9f5d210 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S

@@ -80,8 +80,8 @@ _ENTRY(_start);
 	slw	r18,r18,r17		/* r18 = page size */
 	addi	r18,r18,-1
 	and	r19,r3,r18		/* r19 = page offset */
-	andc	r31,r20,r18		/* r3 = page base */
-	or	r31,r31,r19		/* r3 = devtree phys addr */
+	andc	r31,r20,r18		/* r31 = page base */
+	or	r31,r31,r19		/* r31 = devtree phys addr */
 	mfspr	r30,SPRN_MAS7
 
 	li	r25,0			/* phys kernel start (low) */

-- 
1.7.6.1

This is not strictly required, because this iterates over logical
cpus and they are not (currently) discontigous. But, it's cleaner
code and more obvious what is going on

Signed-off-by: Matthew McClintock <redacted>
---
 arch/powerpc/platforms/85xx/smp.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 5b9b901..b830f8a 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c

@@ -206,7 +206,7 @@ static void mpc85xx_smp_machine_kexec(struct kimage *image)
 	if ( !timeout )
 		printk(KERN_ERR "Unable to bring down secondary cpu(s)");
 
-	for (i = 0; i < num_cpus; i++)
+	for_each_online_cpu(i)
 	{
 		if ( i == smp_processor_id() ) continue;
 		mpic_reset_core(i);

-- 
1.7.6.1

Currently, we assume the first CPU to come up is the boot cpu. Instead
we can use the boot_cpu_phys from the device tree.

Signed-off-by: Matthew McClintock <redacted>
---
 arch/powerpc/kernel/asm-offsets.c    |    4 ++++
 arch/powerpc/kernel/head_fsl_booke.S |    9 ++-------
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 536ffa8..264f8ad 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c

@@ -28,6 +28,7 @@
 #include <linux/hardirq.h>
 #endif
 #include <linux/kbuild.h>
+#include <linux/of_fdt.h>
 
 #include <asm/io.h>
 #include <asm/page.h>

@@ -619,5 +620,8 @@ int main(void)
 	DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
 #endif
 
+	DEFINE(DT_BOOTCPU, offsetof(struct boot_param_header,
+					boot_cpuid_phys));
+
 	return 0;
 }

diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 9f5d210..eb28ade 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S

@@ -87,6 +87,7 @@ _ENTRY(_start);
 	li	r25,0			/* phys kernel start (low) */
 	li	r24,0			/* CPU number */
 	li	r23,0			/* phys kernel start (high) */
+	lwz	r22,DT_BOOTCPU(r3)	/* boot_cpuid_phys */
 
 /* We try to not make any assumptions about how the boot loader
  * setup or used the TLBs.  We invalidate all mappings from the

@@ -166,11 +167,8 @@ _ENTRY(__early_start)
 	/* Check to see if we're the second processor, and jump
 	 * to the secondary_start code if so
 	 */
-	lis	r24, boot_cpuid@h
-	ori	r24, r24, boot_cpuid@l
-	lwz	r24, 0(r24)
-	cmpwi	r24, -1
 	mfspr   r24,SPRN_PIR
+	cmpw	r22,r24
 	bne	__secondary_start
 #endif
 

@@ -192,9 +190,6 @@ _ENTRY(__early_start)
 	li	r0,0
 	stwu	r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
 
-	rlwinm  r22,r1,0,0,31-THREAD_SHIFT      /* current thread_info */
-	stw	r24, TI_CPU(r22)
-
 	bl	early_init
 
 #ifdef CONFIG_RELOCATABLE

-- 
1.7.6.1

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completely go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

Signed-off-by: Matthew McClintock <redacted>
---
Could also just change boot_cpuid every to init_thread_info.cpu instead
of using this define

This is only tested on 32-bit parts, only compiled on 64-bit

 arch/powerpc/include/asm/smp.h |    2 +-
 arch/powerpc/kernel/setup_32.c |    7 ++++---
 arch/powerpc/kernel/setup_64.c |    1 -
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index adba970..f26c554 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h

@@ -29,7 +29,7 @@
 #endif
 #include <asm/percpu.h>
 
-extern int boot_cpuid;
+#define boot_cpuid 	(init_thread_info.cpu)
 extern int spinning_secondaries;
 
 extern void cpu_die(void);

diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index c1ce863..f396847 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c

@@ -46,10 +46,11 @@
 
 extern void bootx_init(unsigned long r4, unsigned long phys);
 
-int boot_cpuid = -1;
-EXPORT_SYMBOL_GPL(boot_cpuid);
-int boot_cpuid_phys;
+/* we need a place to store phys cpu for non-SMP case */
+#ifndef CONFIG_SMP
+int boot_cpuid_phys = -1;
 EXPORT_SYMBOL_GPL(boot_cpuid_phys);
+#endif
 
 int smp_hw_index[NR_CPUS];
 

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index d4168c9..eacefba 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c

@@ -73,7 +73,6 @@
 #define DBG(fmt...)
 #endif
 
-int boot_cpuid = 0;
 int __initdata spinning_secondaries;
 u64 ppc64_pft_size;
 

-- 
1.7.6.1

On Oct 25, 2011, at 5:54 PM, Matthew McClintock wrote:

This is listed as a requirement after issuing a core reset to
properly clear pending interrupts
=20

Fix comment message to be more clear on 'what' this is required. [ its a =
requirement on FSL corenet series / MPIC v4.x ]

*/

+	for (i =3D 0; i < 15; i++) {
+		_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
+				      MPIC_CPU_EOI, 0);
+	}
}
#endif /* CONFIG_SMP */
=20
--=20
1.7.6.1
=20
=20
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

This is listed as a requirement for Freescale CoreNet based devices  (e.g
p4080ds with MPIC v4.x) after issuing a core reset to properly clear pending
interrupts.

Signed-off-by: Matthew McClintock <redacted>
---
v2: Updated commit message

 arch/powerpc/sysdev/mpic.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9678081..f5b83f0 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c

@@ -1748,6 +1748,7 @@ void mpic_reset_core(int cpu)
 	struct mpic *mpic = mpic_primary;
 	u32 pir;
 	int cpuid = get_hard_smp_processor_id(cpu);
+	int i;
 
 	/* Set target bit for core reset */
 	pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

@@ -1759,6 +1760,12 @@ void mpic_reset_core(int cpu)
 	pir &= ~(1 << cpuid);
 	mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);
 	mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
+
+	/* Perform 15 EOI on each reset core to clear pending interrupts */
+	for (i = 0; i < 15; i++) {
+		_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
+				      MPIC_CPU_EOI, 0);
+	}
 }
 #endif /* CONFIG_SMP */
 

-- 
1.7.6.1

This is generic code, right?  Please add info to the comment about
which devices need this quirk, then.


Segher

This is listed as a requirement for Freescale CoreNet based devices  (e.g
p4080ds with MPIC v4.x) after issuing a core reset to properly clear pending
interrupts.

Signed-off-by: Matthew McClintock <redacted>
---
 v2: Updated commit message
 v3: Added detail in code comment as well

arch/powerpc/sysdev/mpic.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9678081..d641481 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c

@@ -1748,6 +1748,7 @@ void mpic_reset_core(int cpu)
 	struct mpic *mpic = mpic_primary;
 	u32 pir;
 	int cpuid = get_hard_smp_processor_id(cpu);
+	int i;
 
 	/* Set target bit for core reset */
 	pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

@@ -1759,6 +1760,13 @@ void mpic_reset_core(int cpu)
 	pir &= ~(1 << cpuid);
 	mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);
 	mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
+
+	/* Perform 15 EOI on each reset core to clear pending interrupts.
+	 * This is required for FSL CoreNet based devices */
+	for (i = 0; i < 15; i++) {
+		_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
+				      MPIC_CPU_EOI, 0);
+	}
 }
 #endif /* CONFIG_SMP */
 

-- 
1.7.6.1

This is listed as a requirement for Freescale CoreNet based devices  (e.g
p4080ds with MPIC v4.x) after issuing a core reset to properly clear pending
interrupts.

Signed-off-by: Matthew McClintock <redacted>
---
 v2: Updated commit message
 v3: Added detail in code comment as well
 v4: Check for MPIC_FSL in mpic->flags to determine if we need 15 EOIs

 arch/powerpc/sysdev/mpic.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9678081..0842c6f 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c

@@ -1748,6 +1748,7 @@ void mpic_reset_core(int cpu)
 	struct mpic *mpic = mpic_primary;
 	u32 pir;
 	int cpuid = get_hard_smp_processor_id(cpu);
+	int i;
 
 	/* Set target bit for core reset */
 	pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));

@@ -1759,6 +1760,15 @@ void mpic_reset_core(int cpu)
 	pir &= ~(1 << cpuid);
 	mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);
 	mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
+
+	/* Perform 15 EOI on each reset core to clear pending interrupts.
+	 * This is required for FSL CoreNet based devices */
+	if (mpic->flags & MPIC_FSL) {
+		for (i = 0; i < 15; i++) {
+			_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
+				      MPIC_CPU_EOI, 0);
+		}
+	}
 }
 #endif /* CONFIG_SMP */
 

-- 
1.7.6.1

On Oct 26, 2011, at 1:46 PM, Matthew McClintock wrote:

This is listed as a requirement for Freescale CoreNet based devices  =

(e.g

p4080ds with MPIC v4.x) after issuing a core reset to properly clear =

pending

interrupts.
=20
Signed-off-by: Matthew McClintock <redacted>
---
v2: Updated commit message
v3: Added detail in code comment as well
v4: Check for MPIC_FSL in mpic->flags to determine if we need 15 EOIs
=20
arch/powerpc/sysdev/mpic.c |   10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)

applied

- k=

On Oct 25, 2011, at 5:54 PM, Matthew McClintock wrote:

Fix typo in comments introduced by:

commit 6dece0eb69b2a28e18d104bc5d707f1cb673f5e0
Author: Scott Wood [off-list ref]
Date:   Mon Jul 25 11:29:33 2011 +0000

   powerpc/32: Pass device tree address as u64 to machine_init

Signed-off-by: Matthew McClintock <redacted>
cc: Scott Wood <redacted>
---
arch/powerpc/kernel/head_fsl_booke.S |    4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)

applied

- k

On Oct 25, 2011, at 5:54 PM, Matthew McClintock wrote:

This is not strictly required, because this iterates over logical
cpus and they are not (currently) discontigous. But, it's cleaner
code and more obvious what is going on

Signed-off-by: Matthew McClintock <redacted>
---
arch/powerpc/platforms/85xx/smp.c |    2 +-
1 files changed, 1 insertions(+), 1 deletions(-)

applied

- k

On Tue, 2011-10-25 at 17:54 -0500, Matthew McClintock wrote:

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

Breaks pseries build. Looks trivial but I haven't had a chance to fix
it (obvious one liner didn't do it and no time today).

Please re-submit fixed.

Cheers,
Ben.

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

Signed-off-by: Matthew McClintock <redacted>
---
v2: Fix compile issue for peries
    Remove '-1' initial value

 arch/powerpc/include/asm/smp.h         |    2 +-
 arch/powerpc/kernel/setup_32.c         |    5 +++--
 arch/powerpc/kernel/setup_64.c         |    1 -
 arch/powerpc/sysdev/xics/xics-common.c |    1 +
 4 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index adba970..f26c554 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h

@@ -29,7 +29,7 @@
 #endif
 #include <asm/percpu.h>
 
-extern int boot_cpuid;
+#define boot_cpuid 	(init_thread_info.cpu)
 extern int spinning_secondaries;
 
 extern void cpu_die(void);

diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index ac76108..8d4df4c 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c

@@ -46,10 +46,11 @@
 
 extern void bootx_init(unsigned long r4, unsigned long phys);
 
-int boot_cpuid = -1;
-EXPORT_SYMBOL_GPL(boot_cpuid);
+/* we need a place to store phys cpu for non-SMP case */
+#ifndef CONFIG_SMP
 int boot_cpuid_phys;
 EXPORT_SYMBOL_GPL(boot_cpuid_phys);
+#endif
 
 int smp_hw_index[NR_CPUS];
 

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index fb9bb46..6d0f00f 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c

@@ -73,7 +73,6 @@
 #define DBG(fmt...)
 #endif
 
-int boot_cpuid = 0;
 int __initdata spinning_secondaries;
 u64 ppc64_pft_size;
 

diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index d72eda6..8998b7a 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c

@@ -20,6 +20,7 @@
 #include <linux/of.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
+#include <linux/sched.h>
 
 #include <asm/prom.h>
 #include <asm/io.h>

-- 
1.7.6.1

On Mon, 2011-11-28 at 22:24 -0600, Matthew McClintock wrote:

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

So what about head_fsl_booke.S comparing boot_cpuid to -1 ? That seems
to be broken now in at least 2 ways, boot_cpuid doesn't exist anymore
and you don't initialize it to -1 either...

Cheers,
Ben.

On Thu, Dec 15, 2011 at 9:12 PM, Benjamin Herrenschmidt
[off-list ref] wrote:

On Mon, 2011-11-28 at 22:24 -0600, Matthew McClintock wrote:

quoted

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

So what about head_fsl_booke.S comparing boot_cpuid to -1 ? That seems
to be broken now in at least 2 ways, boot_cpuid doesn't exist anymore
and you don't initialize it to -1 either...

This is 4/5 which is also waiting for your review.

http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-October/093474.html

-M=

On Fri, 2011-12-16 at 03:29 +0000, McClintock Matthew-B29882 wrote:

On Thu, Dec 15, 2011 at 9:12 PM, Benjamin Herrenschmidt
[off-list ref] wrote:

quoted

On Mon, 2011-11-28 at 22:24 -0600, Matthew McClintock wrote:

quoted

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

So what about head_fsl_booke.S comparing boot_cpuid to -1 ? That seems
to be broken now in at least 2 ways, boot_cpuid doesn't exist anymore
and you don't initialize it to -1 either...

This is 4/5 which is also waiting for your review.

http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-October/093474.html

Ah missed that. This is FSL specific, I'd need Kumar and/or Scott's ack
for that one.

Cheers,
Ben.

On Thu, Dec 15, 2011 at 9:35 PM, Benjamin Herrenschmidt
[off-list ref] wrote:

quoted

This is 4/5 which is also waiting for your review.

http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-October/093474.html

Ah missed that. This is FSL specific, I'd need Kumar and/or Scott's ack
for that one.

I believe Kumar was waiting on your review of 5/5. I'll let you guys discus=
s.

-M=

On 12/15/2011 09:35 PM, Benjamin Herrenschmidt wrote:

On Fri, 2011-12-16 at 03:29 +0000, McClintock Matthew-B29882 wrote:

quoted

On Thu, Dec 15, 2011 at 9:12 PM, Benjamin Herrenschmidt
[off-list ref] wrote:

quoted

On Mon, 2011-11-28 at 22:24 -0600, Matthew McClintock wrote:

quoted

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

Where does the ordering matter currently?

quoted

quoted

So what about head_fsl_booke.S comparing boot_cpuid to -1 ? That seems
to be broken now in at least 2 ways, boot_cpuid doesn't exist anymore
and you don't initialize it to -1 either...

This is 4/5 which is also waiting for your review.

http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-October/093474.html

Ah missed that. This is FSL specific, I'd need Kumar and/or Scott's ack
for that one.

It would be nice if we could eliminate all usage of the boot cpu dtb
field -- it's easy to forget to set it, especially if you're not making
an AMP config.  The default -1 means this patch would break booting with
such a tree.

If we don't want to record the PIR of the first CPU to enter as the boot
CPU (is the concern implementations where the CPU node's reg is not the
same as what's in PIR?), how about just having a variable that gets set
before releasing secondaries?  If you're in the boot entry code and that
variable is set, you're a secondary.  Or, use a distinct release address
for secondaries rather than __early_start.

-Scott

On Fri, 2011-12-16 at 15:29 -0600, Scott Wood wrote:

It would be nice if we could eliminate all usage of the boot cpu dtb
field -- it's easy to forget to set it, especially if you're not making
an AMP config.  The default -1 means this patch would break booting with
such a tree.

If we don't want to record the PIR of the first CPU to enter as the boot
CPU (is the concern implementations where the CPU node's reg is not the
same as what's in PIR?), how about just having a variable that gets set
before releasing secondaries?  If you're in the boot entry code and that
variable is set, you're a secondary.  Or, use a distinct release address
for secondaries rather than __early_start.

Of course you can only do that on processors that have a reliable
PIR :-)

Cheers,
Ben.

On Fri, Dec 16, 2011 at 3:29 PM, Scott Wood [off-list ref] wrote=
:

On 12/15/2011 09:35 PM, Benjamin Herrenschmidt wrote:

quoted

On Fri, 2011-12-16 at 03:29 +0000, McClintock Matthew-B29882 wrote:

quoted

On Thu, Dec 15, 2011 at 9:12 PM, Benjamin Herrenschmidt
[off-list ref] wrote:

quoted

On Mon, 2011-11-28 at 22:24 -0600, Matthew McClintock wrote:

quoted

boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value

boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is not around to store this info

This patch also has the effect of having the logical cpu number
of the boot cpu be updated correctly independently of the ordering
of the cpu nodes in the device tree.

Where does the ordering matter currently?

The kernel won't boot if the order of the cpu nodes in the device tree
does not match the reg property. This can be fixed by using
init_thread_info.cpu instead of a separate variable - which seems to
be correct since we don't actually need a separate boot_cpuid variable
at all for powerpc. The correct initialization occurs in this scenario
in early_init_dt_scan_cpus(). (boot_cpuid maps to init_thread_info.cpu
via a define and could be just renamed everywhere in arch/powerpc/ )

quoted

quoted

quoted

So what about head_fsl_booke.S comparing boot_cpuid to -1 ? That seems
to be broken now in at least 2 ways, boot_cpuid doesn't exist anymore
and you don't initialize it to -1 either...

This is 4/5 which is also waiting for your review.

http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-October/093474.html

Ah missed that. This is FSL specific, I'd need Kumar and/or Scott's ack
for that one.

It would be nice if we could eliminate all usage of the boot cpu dtb
field -- it's easy to forget to set it, especially if you're not making
an AMP config. =A0The default -1 means this patch would break booting wit=

h

such a tree.

I can add a check here to see if the boot cpu in the device tree is -1
to assume this is the boot cpu in addition to the boot cpu matching
the PIR. This seems like the best approach to me, keep what I have in
these two patches and add this additional check to keep all device
tree's working properly.

If we don't want to record the PIR of the first CPU to enter as the boot
CPU (is the concern implementations where the CPU node's reg is not the
same as what's in PIR?),

This is something that has been fixed by using init_thread_info.cpu
above, we don't need to change the current method of booting we are
doing. I was just making some additional fixes Ben requested while I
was looking at the same code fix some kexec issues with device tree
ordering.

Basically (I think) all we need to fix the device tree order is the followi=
ng:

-extern int boot_cpuid;
+#define boot_cpuid     (init_thread_info.cpu)

And all the other stuff could remain the same. That is we check some
variable and see if it's -1, if it is we are the boot cpu and we
change that variable to something else and the other cpus that boot
will know they are secondary cpus.

how about just having a variable that gets set
before releasing secondaries? =A0If you're in the boot entry code and tha=

t

variable is set, you're a secondary. =A0Or, use a distinct release addres=

s

for secondaries rather than __early_start.

The former method is the way things are working now, and the latter is
another possible solution which would require some more though/work
for me than the current changes.

-M=

On 12/20/2011 12:44 PM, McClintock Matthew-B29882 wrote:

On Fri, Dec 16, 2011 at 3:29 PM, Scott Wood [off-list ref] wrote:

quoted

It would be nice if we could eliminate all usage of the boot cpu dtb
field -- it's easy to forget to set it, especially if you're not making
an AMP config.  The default -1 means this patch would break booting with
such a tree.

I can add a check here to see if the boot cpu in the device tree is -1
to assume this is the boot cpu in addition to the boot cpu matching
the PIR. 

Won't that break on secondaries with a -1 dtb?

-Scott