[PATCH 14/14] 8xx: The TLB miss handler manages ACCESSED correctly.
STALE5290d
From: Joakim Tjernlund <hidden>
Date: 2011-10-10 11:30:46
Subsystem:
the rest · Maintainer:
Linus Torvalds
Revision v1 of 2 in this series.
Revisions (2)
- v1 [diff vs current]
- v1 current
The new MMU/TLB code no longer sets ACCESSED unconditionally so remove the exception. Signed-off-by: Joakim Tjernlund <redacted> --- include/asm-ppc/pgtable.h | 10 ---------- 1 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index 6cfc5fc..b94e8a8 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h@@ -318,16 +318,6 @@ extern unsigned long vmalloc_start; #define _PMD_PAGE_MASK 0x000c #define _PMD_PAGE_8M 0x000c -/* - * The 8xx TLB miss handler allegedly sets _PAGE_ACCESSED in the PTE - * for an address even if _PAGE_PRESENT is not set, as a performance - * optimization. This is a bug if you ever want to use swap unless - * _PAGE_ACCESSED is 2, which it isn't, or unless you have 8xx-specific - * definitions for __swp_entry etc. below, which would be gross. - * -- paulus - */ -#define _PTE_NONE_MASK _PAGE_ACCESSED - #else /* CONFIG_6xx */ /* Definitions for 60x, 740/750, etc. */ #define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
--
1.7.3.4