-----Original Message-----
From: Wolfram Sang [mailto:w.sang@pengutronix.de]
Sent: Friday, September 09, 2011 20:33 PM
To: Zang Roy-R61911
Cc: cjb@laptop.org; linux-mmc@vger.kernel.org; linuxppc-dev@lists.ozlabs.=

org;

akpm@linux-foundation.org; cbouatmailru@gmail.com; Xu Lei-B33228; Kumar G=

ala

Subject: Re: [PATCH] eSDHC: Access Freescale eSDHC registers by 32-bit
=20
On Fri, Sep 09, 2011 at 12:23:05PM +0000, Zang Roy-R61911 wrote:
=20

quoted

quoted

quoted

Freescale eSDHC registers only support 32-bit accesses,
this patch ensures that all Freescale eSDHC register accesses
are 32-bit.

So, what about the byte-swapping that Anton needed? You are simply
removing that if I am not mistaken.

I do not see any comment for this patch from Anton.

=20
Maybe he is busy?

Sounds fair.

=20

quoted

You may miss the patch. Please confirm.

=20
I don't understand, what needs to be confirmed?

Confirm: there is no comment about this patch.=20
Previously, I sent this patch together  with another one. But technically t=
hey are separated patches.  I got some comments from Anton about the patch.=
 I will try to address the comment. but for this one, it is a stand along p=
atch. I'd like to push it first.

I am simply wondering
what happens to the byteswapping that Anton (back then) intentionally
implemented.

I do not see any comment about byte swapping about this patch.
you may have mis-understanding here.
Roy