Thread (10 messages) flat view 10 messages, 3 authors, 2011-08-09

Re: [PATCH 1/3] powerpc: Split ICSWX ACOP and PID processing

From: Kumar Gala <hidden>
Date: 2011-08-09 05:21:09

On Aug 8, 2011, at 5:26 PM, Jimi Xenidis wrote:
Some processors, like embedded, that already have a PID register that
is managed by the system.  This patch separates the ACOP and PID
processing into separate files so that the ACOP code can be shared.
=20
Signed-off-by: Jimi Xenidis <redacted>
---
arch/powerpc/mm/Makefile               |    4 +-
arch/powerpc/mm/icswx.c                |  163 =
++++++++++++++++++++++++++
arch/powerpc/mm/icswx.h                |   34 ++++++
arch/powerpc/mm/icswx_pid.c            |   87 ++++++++++++++
arch/powerpc/mm/mmu_context_hash64.c   |  195 =
--------------------------------
quoted hunk ↗ jump to hunk
arch/powerpc/platforms/Kconfig.cputype |   10 ++-
6 files changed, 296 insertions(+), 197 deletions(-)
create mode 100644 arch/powerpc/mm/icswx.c
create mode 100644 arch/powerpc/mm/icswx.h
create mode 100644 arch/powerpc/mm/icswx_pid.c
=20
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index bdca46e..ba51190 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -21,7 +21,9 @@ obj-$(CONFIG_PPC_STD_MMU_32)	+=3D =
ppc_mmu_32.o
obj-$(CONFIG_PPC_STD_MMU)	+=3D hash_low_$(CONFIG_WORD_SIZE).o \
				   tlb_hash$(CONFIG_WORD_SIZE).o \
				   mmu_context_hash$(CONFIG_WORD_SIZE).o
-obj-$(CONFIG_40x)		+=3D 40x_mmu.o
+obj-$(CONFIG_PPC_ICSWX)		+=3D icswx.o
+obj-$(CONFIG_PPC_ICSWX_PID)	+=3D icswx_pid.o
+obj-$(CONFIG_40x)		+=3D 40x_mmu.o?
? seems like a typo
obj-$(CONFIG_44x)		+=3D 44x_mmu.o
obj-$(CONFIG_PPC_FSL_BOOK3E)	+=3D fsl_booke_mmu.o
obj-$(CONFIG_NEED_MULTIPLE_NODES) +=3D numa.o
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