RE: Flushing data cache on PPC405 in Linux

-----Original Message-----
From: John Linn
Sent: Thursday, February 24, 2011 7:15 AM
To: 'Dan Malek'
Cc: linuxppc-dev@ozlabs.org; grant.likely@secretlab.ca
Subject: RE: Flushing data cache on PPC405 in Linux
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quoted

-----Original Message-----
From: Dan Malek [mailto:ppc6dev@digitaldans.com]
Sent: Wednesday, February 23, 2011 8:39 PM
To: John Linn
Cc: linuxppc-dev@ozlabs.org
Subject: Re: Flushing data cache on PPC405 in Linux


Hi John.

On Feb 23, 2011, at 5:04 PM, John Linn wrote:

quoted

Any thoughts?

I can come up with two methods, but before I describe them
ensure you consider the actual implementation of your 405 core.
My comments are based on the "standard" ppc405 processor,
but since you can configure the embedded cores to your liking,
the cache size may be different that the 16K bytes on the old
processor.

Method one.  Just 'memset()' 16K of data that will replace all cache
lines and push out modified lines.  This 16K must be physically
contiguous, so allocate in your favorite way, with with the cache
coherent DMA functions, bootmem, reserved, whatever.  Just
ensure that this 16K is also cached, as I've implemented
dma_cache_coherent into uncached VM space in the past :-)

=

Awesome Dan, that seems reasonable to me and much easier than I was

thinking :)

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I was obviously making it harder than it had to be as usual. Seems

like I can just kmalloc the memory

then memset it.

It seems like this also depends on that fact that __GFP_COLD will work,
otherwise some of the data could =

already be in the cache such that you're not guaranteed to get
everything out of the cache.

Do we know that works on arch/powerpc, or I'm not understanding it
right?  I'm doing some digging to make sure.

Thanks,
John

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Appreciate the help and suggestions.
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-- John
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quoted

Method two.  Use 'dcread' to read the cache tags.  If the line is
modified, form an EA that will match that line and 'dcbf' the line.
This is a little more tricky because the tags are physical

addresses,

quoted

so you would need to do this with the MMU disabled to ensure
the physical EA you generated also hits the cache.  The upside
is you only perform the actual required flush operations, and you
didn't blow the cache away requiring a refill latency.

Have fun!

	-- Dan

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