Am 08.07.10 17:22 schrieb(en) Grant Likely:

quoted

Just out of curiousity, what configuration might cause a byte-wise alignment not to work?

Can't remember the register configuration, but I worked on one project where this was the case.  In hindsight, it was probably a mis-configuration of the localbus CS for the particular device.

Not sure if you're thinking of this configuration, but if you attach a device in 16-bit mode (i.e. 16 data lines) to the LPB, byte writes simply don't work.  I ran into that problem as I have a nvram attached this way to a 5200b.  Using the device as mtd-ram with a jffs2 file system on it I also sometimes saw corruption after a write.

I had a patch for that last year, but it was actually badly crafted (see <http://lists.ozlabs.org/pipermail/linuxppc-dev/2009-June/072903.html>).  I still use the mpc52xx_memcpy2lpb16() function somewhere in my current code which is actually an ugly hack (but it works...).

Actually, this is something which might need closer attention - and maybe some support in the device tree indicating which read or write width a device can accept?

Best, Albrecht.