[PATCH v2 3/4] powerpc: add e500 HID1 bit definition
From: Li Yang <hidden>
Date: 2010-06-18 06:33:26
Subsystem:
linux for powerpc (32-bit and 64-bit), the rest · Maintainers:
Madhavan Srinivasan, Michael Ellerman, Linus Torvalds
Also make 74xx HID1 definition conditional. Signed-off-by: Li Yang <redacted> --- arch/powerpc/include/asm/reg.h | 2 ++ arch/powerpc/include/asm/reg_booke.h | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index d62fdf4..235d356 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h@@ -283,6 +283,7 @@ #define HID0_NOPTI (1<<0) /* No-op dcbt and dcbst instr. */ #define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ +#ifdef CONFIG_6xx #define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */ #define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */ #define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */
@@ -292,6 +293,7 @@ #define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */ #define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ #define HID1_PS (1<<16) /* 750FX PLL selection */ +#endif #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ #define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */ #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 2360317..6d393f7 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h@@ -245,6 +245,22 @@ store or cache line push */ #endif +/* Bit definitions for the HID1 */ +#ifdef CONFIG_E500 +#ifndef CONFIG_PPC_E500MC +/* e500v1/v2 */ +#define HID1_PLL_CFG_MASK 0xfc000000UL /* PLL_CFG input pins */ +#define HID1_RFXE 0x00020000UL /* Read fault exception enable */ +#define HID1_R1DPE 0x00008000UL /* R1 data bus parity enable */ +#define HID1_R2DPE 0x00004000UL /* R2 data bus parity enable */ +#define HID1_ASTME 0x00002000UL /* Address bus streaming mode enable */ +#define HID1_ABE 0x00001000UL /* Address broadcast enable */ +#define HID1_MPXTT 0x00000400UL /* MPX re-map transfer type */ +#define HID1_ATS 0x00000080UL /* Atomic status */ +#define HID1_MID_MASK 0x0000000fUL /* MID input pins */ +#endif +#endif + /* Bit definitions for the DBSR. */ /* * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
--
1.6.4