On May 21, 2010, at 9:16 AM, Haiying Wang wrote:

P1021 is a dual e500v2 core based SOC with:
* 3 eTSECs (eTSEC1/3 RGMII, eTSEC2 SGMII on this board)
* 2 PCIe Controller
* 1 USB2.0 controller
* eSDHC, eSPI, I2C, DUART
* eLBC (NAND, BCSR, PMC0/1)
* Security Engine (SEC 3.3.2)
* Quicc Engine (QE)
=20
Signed-off-by: Haiying Wang <redacted>
Signed-off-by: Yu Liu <redacted>
---
v2: address the comments from Kumar.
arch/powerpc/boot/dts/p1021mds.dts        |  698 =

+++++++++++++++++++++++++++++

arch/powerpc/platforms/85xx/mpc85xx_mds.c |  102 ++++-
2 files changed, 797 insertions(+), 3 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1021mds.dts

applied to next

- k=