Re: [PATCH 2/2] powerpc/mpc5121: add initial support for PDM360NG board

On Wed, May 19, 2010 at 3:37 PM, Scott Wood [off-list ref] wrote=
:

On 05/19/2010 04:27 PM, Grant Likely wrote:

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On Mon, May 3, 2010 at 10:34 AM, Scott Wood[off-list ref]
=A0wrote:

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Grant Likely wrote:

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 // IPIC
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 // interrupts cell =3D<intr #, sense>
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 // sense values match linux IORESOURCE_=

IRQ_* defines:

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 // sense =3D=3D 8: Level, low assertion
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 // sense =3D=3D 2: Edge, high-to-low ch=

ange

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 //
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 ipic: interrupt-controller@c00 {
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "fsl,mpc=

5121-ipic", "fsl,ipic";

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt-controller;
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 #address-cells =3D<0>;

Don't need #address-cells here

#address-cells is required by ePAPR for interrupt controllers if an
interrupt-map is used.

Why?

/me is too lazy to dig out ePAPR and look.

Address cells are part of the interrupt identification. =A0Typically with
interrupt maps this is only used on the child end (e.g. to select a
particular PCI slot), but if the parent interrupt controller's address ce=

lls

are non-zero it will be expected in the parent interrupt specifier as wel=

l.

I believe the only part of this that is new with ePAPR is that it asks th=

at

the interrupt controller address cells be explicitly specified, as it's a
bit icky for it to default to 2 in some contexts and 0 in others.

Hmmm.  I've not seen that before.  On the 5200 the value of
#address-cells for interrupt controllers has apparently defaulted to
<0> so I've never encountered or thought about it.  I'm not even sure
what #address-cells !=3D 0 would mean in the context of interrupt
mapping, or where it would be relevant.

g.