2010/3/22 N=E9meth M=E1rton [off-list ref]:

Hi Grant,

thanks for the comments, I solved some of the points you mentioned. I nee=

d some

more time to work on the others. In the meantime I send the intermediate =

version.

Grant Likely wrote:

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2010/3/13 N=E9meth M=E1rton [off-list ref]:

[...]

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+ =A0 =A0 =A0 memory@40000000 {
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 device_type =3D "memory";
+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x40000000 0x10000>; =A0 =A0 // =

32KiB internal SRAM

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+ =A0 =A0 =A0 };

Oh.... this is the small SRAM. =A0yeah, you should move this under the
appropriate bridge node, remove the device_type property, and add a
compatible property. =A0Memory nodes at the root like this are used to
describe what is basically main memory (what Linux will execute out
of). =A0You'll want a new memory node for the external ram hooked up to
the 5554.

Yes, it is the small one (actually 64KiB, I corrected the comment also).
I added the external memory of the MPC5554DEMO evaluation board which has
a size of 512KiB.

Yikes.  Half a meg is tiny for running Linux.

Would it be possible to program the uncompressed kernel to the FLASH so
it can run directly from there? I guess for the code and the constant sec=

tions

the FLASH could be a good place. Then cstart has to initialize the initia=

lized

variables by copying data from FLASH to RAM and fill the BSS area with ze=

ro.

Hmmm.  I don't know if anyone has kernel execute in place (XIP)
working on PowerPC.

[...]

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 siu@3f89000 { =A0 =A0 =A0=

 =A0 =A0 // System Integration Unit

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatibl=

e =3D "fsl,mpc5554-siu";

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <=

0x03f90000 0x4000>;

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt=

s =3D <45 1 =A0 =A0 =A0// External Interrupt Overrun 0-15

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 46 1 =A0 =A0 =A0// External Interrupt 0

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 47 1 =A0 =A0 =A0// External Interrupt 1

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 48 1 =A0 =A0 =A0// External Interrupt 2

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 49 1 =A0 =A0 =A0// External Interrupt 3

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 50 1>; =A0 =A0// External Interrupt 4-15

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 };

This doesn't look quite right.... /me goes to look at the 5554
reference manual....

Okay, so all the external IRQs go through the SIU then, even though
the first 4 get passed straight through to the intc? =A0And I see that
all the level/edge sensing and masking/acknowledging is done at the
SIU level, not the intc level, correct? =A0So, what you effectively have
is the SIU is *another* interrupt controller that is cascaded to the
intc. =A0Therefore you need to add the following to this node:

#interrupt-cells =3D <2>; =A0 // cell1:extirq#, cell2:level/edge flags
interrupt-controller;

Also give the node a label so that nodes for external devices can
reference it for hooking up external irqs by overriding the top-level
interrupt-parent property.

Also, it would appear that intc interrupts don't have any level/edge
configuration associated with them. =A0They are either asserted, or they
are not, correct? =A0At the moment you're specifying every intc
interrupt with 2 cells, and the 2nd cell is always '1'. =A0I think you
can change #interrupt-cells to <1> in the intc node and drop the '1'
everywhere.

When you write your intc driver, you'll also need to write the
cascaded driver for the external IRQs.

I tried to solve this point but I'm not quite sure whether the SIU interr=

upt

numbers shall be kept on the siu@3f89000 node or not.

Yes, you'll want the irq numbers to remain in the siu node because
those are the 'cascade' irqs that the siu raises when the external
irqs are asserted.

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 emios@3fa0000 { =A0 =A0 =

=A0 =A0 // Modular Timer System

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatibl=

e =3D "fsl,mpc5554-emios";

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <=

0x03fa0000 0x4000>;

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt=

s =3D <51 1 =A0 =A0 =A0// Channel 0

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 52 1 =A0 =A0 =A0// Channel 1

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 53 1 =A0 =A0 =A0// Channel 2

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 54 1 =A0 =A0 =A0// Channel 3

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 55 1 =A0 =A0 =A0// Channel 4

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 56 1 =A0 =A0 =A0// Channel 5

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 57 1 =A0 =A0 =A0// Channel 6

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 58 1 =A0 =A0 =A0// Channel 7

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 59 1 =A0 =A0 =A0// Channel 8

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 60 1 =A0 =A0 =A0// Channel 9

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 61 1 =A0 =A0 =A0// Channel 10

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 62 1 =A0 =A0 =A0// Channel 11

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 63 1 =A0 =A0 =A0// Channel 12

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 64 1 =A0 =A0 =A0// Channel 13

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 65 1 =A0 =A0 =A0// Channel 14

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 66 1 =A0 =A0 =A0// Channel 15

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 202 1 =A0 =A0 // Channel 16

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 203 1 =A0 =A0 // Channel 17

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 204 1 =A0 =A0 // Channel 18

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 205 1 =A0 =A0 // Channel 19

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 206 1 =A0 =A0 // Channel 20

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 207 1 =A0 =A0 // Channel 21

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 208 1 =A0 =A0 // Channel 22

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+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =

=A0 =A0 =A0 =A0 =A0 209 1>; =A0 // Channel 23

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These long lists bother me, but looking at the manual they seem to
describe the actual hardware architecture, so I think they are
probably fine. =A0But you may want to compact your formatting somewhat.
You can probably list more than one channel per
source line in the file.

Ditto through the rest of the file.

I would keep the list like this because in this case it is easy to find
which comment belongs to which interrupt number. Otherwise one would need
to count the interrupt numbers and the comment to find out which number m=

atch

which comment.

You could do it in this style to keep the verbosity down:

      interrupts =3D <51 52 53 54 55 56 57 58  // Channels 0-7
                    59 60 61 62 63 64 65 66  // Channels 8-15
                    202 203 204 205 206 207 208 209>;  // Channel 16-23

--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.