Re: [PATCH 6/6] powerpc: Use lwsync for acquire barrier if CPU supports it
From: Nick Piggin <hidden>
Date: 2010-02-11 07:09:18
From: Nick Piggin <hidden>
Date: 2010-02-11 07:09:18
On Wed, Feb 10, 2010 at 10:10:25PM +1100, Anton Blanchard wrote:
Nick Piggin discovered that lwsync barriers around locks were faster than isync on 970. That was a long time ago and I completely dropped the ball in testing his patches across other ppc64 processors. Turns out the idea helps on other chips. Using a microbenchmark that uses a lot of threads to contend on a global pthread mutex (and therefore a global futex), POWER6 improves 8% and POWER7 improves 2%. I checked POWER5 and while I couldn't measure an improvement, there was no regression.
Ah, good to see this one come back. I also tested tbench over localhost btw which actually did show some speedup on the G5. BTW. this was the last thing left: http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg29738.html Don't know if you took a look at that again, but maybe it's worth looking at. Hmm, we do actually seem to be growing number of smp_mb* calls in core kernel too.