Thread (2 messages) 2 messages, 2 authors, 2010-02-18

Re: [Patch v2 1/2] 5200/mpc: improve i2c bus error recovery

From: Joakim Tjernlund <hidden>
Date: 2010-02-18 12:33:08
Also in: linux-devicetree

Possibly related (same subject, not in this thread)

"Albrecht Dre=DF" [off-list ref] wrote on 2010/02/18 10:09:2=
3:
Hi Joakim:
quoted
Does this reset sequence also send a START condition for every cloc=
k?
Please see the attached scan from a scope output, showing the first t=
wo out of
the 9 sequences at 375 kHz (that's what the 5200's divider makes from=
 400 kHz
requested).  Resolution is 2us/div and 1V/div for both signals.  The =
waveform
itself for each of the 9 sequences is exactly the same we had before =
with the
old solution, just the timing is faster and adjusted to the ii2c cloc=
k, i.e.
the /relative/ waveforms look identical for slower clocks.

Any insight if this is *really* correct would be great, as I'm not an=
 i2c
expert.  I can only say it reliably fixes the bus hangs I saw!
Looks like you do a STOP then START each time SCL is high so yes you
do a START each SCL and a STOP too. Don't think the STOP will hurt thou=
gh.

Timing is OK for FAST-MODE(400kHz), cannot say for STANDARD-MODE though=

need a 100Khz scope img for that.

The times to look for are:
tHD;STA, tSU;STA, tSU;STO and tBUF
at least that is what I have identified.

   Jocke=
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