Thread (16 messages) 16 messages, 4 authors, 2009-11-15
STALE6044d
Revisions (4)
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  2. v1 current
  3. v1 [diff vs current]
  4. v6 [diff vs current]

[PATCH 00/10] Fix 8xx MMU/TLB

From: Joakim Tjernlund <hidden>
Date: 2009-11-14 10:42:37

This is hopfully the last iteration of the series.
Rex & Scott, please test and signoff.
Changes since last version:
 - Added mandatory pinning of iTLB
 - Added "DTLB Miss cleanup"

Joakim Tjernlund (10):
  8xx: invalidate non present TLBs
  8xx: Update TLB asm so it behaves as linux mm expects.
  8xx: Tag DAR with 0x00f0 to catch buggy instructions.
  8xx: Always pin kernel instruction TLB
  8xx: Fixup DAR from buggy dcbX instructions.
  8xx: Add missing Guarded setting in DTLB Error.
  8xx: Restore _PAGE_WRITETHRU
  8xx: start using dcbX instructions in various copy routines
  8xx: Remove DIRTY pte handling in DTLB Error.
  8xx: DTLB Miss cleanup

 arch/powerpc/include/asm/pte-8xx.h |   14 +-
 arch/powerpc/kernel/head_8xx.S     |  315 ++++++++++++++++++++++--------------
 arch/powerpc/kernel/misc_32.S      |   18 --
 arch/powerpc/lib/copy_32.S         |   24 ---
 arch/powerpc/mm/fault.c            |    8 +-
 5 files changed, 211 insertions(+), 168 deletions(-)
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