On Thu, 2009-10-08 at 08:45 +0200, Joakim Tjernlund wrote:
quoted
Generic code should sort it out in handle_mm_fault() (or earlier if it
can't find a VMA at all).
How can it? You need to know more that just read and write.
It does. It's going to look for the VMA, which will tell it what is
allowed or not. You'll notice 4xx/BookE doesn't use DSISR (except the
ESR bit we pass to separate loads from stores).
If the region has no access, the kernel will know it (no VMA for
example) and will trigger a SEGV.
Really, the DSISR stuff is not as necessary as you think it is :-) You
should be able to jump to C code straight from both TLB error
interrupts.
quoted
But that's a slow path anyways.
How so? You take a TLB Error for the first write to
every page.
Compared to the TLB miss that is :-) But my main point is that a TLB
error caused by a lack of DIRTY or ACCESSED will be rare.
Ben.