Re: [U-Boot] NAND ECC Error with wrong SMC ording bug

With the current ndfc code, the error correction gets the bits wrong.
Switching it back to the original way and the correction is correct.

diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 89bf85a..497e175 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c

@@ -101,9 +101,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtd,

=A0 =A0 =A0 =A0wmb();
=A0 =A0 =A0 =A0ecc =3D in_be32(ndfc->ndfcbase + NDFC_ECC);
- =A0 =A0 =A0 /* The NDFC uses Smart Media (SMC) bytes order */
- =A0 =A0 =A0 ecc_code[0] =3D p[2];
- =A0 =A0 =A0 ecc_code[1] =3D p[1];
+ =A0 =A0 =A0 ecc_code[0] =3D p[1];
+ =A0 =A0 =A0 ecc_code[1] =3D p[2];
=A0 =A0 =A0 =A0ecc_code[2] =3D p[3];

=A0 =A0 =A0 =A0return 0;

Does anybody see a problem with my method of reproducing the bug? This
bug is deadly for our customers. I don't want to make the change unless
it is absolutely necessary..