Re: Soft Reset for PPC44x Virtex 5 hangs saying Restarting System

On Mon, Jul 13, 2009 at 9:39 AM, srikanth
krishnakar[off-list ref] wrote:

On Mon, Jul 13, 2009 at 8:32 PM, Grant Likely [off-list ref]
wrote:

quoted

On Mon, Jul 13, 2009 at 1:16 AM, srikanth
krishnakar[off-list ref] wrote:

quoted

Hi all,

Kernel : Linux-2.6.29
Arch: Powerpc (ppc44x)
Target: Xilinx ML507 Virtex5

I have an issue in "Reset System" of Xilinx ML507 target board. I am
using
Compact Flash to boot the target ( using system ACE file to boot the
target), during the process reset or reboot command on the target, I a=

m

quoted

quoted

not
able to reboot the target completely, here is the snapshot:

Where is your boot code located? =A0In BRAM? =A0or SDRAM?

It is located in BRAM.

Then most likely the process of booting modifies the initial data in
BRAM such that it will not be able to reboot the system.

How can I reboot the system, while resetting the FPGA core completely ?

To reset and reconfigure the FPGA, you need to modify the systemace
driver to provide a system reset routine.  See the systemace user
manual for details on how to do this.

g.

--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.