Thread (8 messages) 8 messages, 2 authors, 2009-03-24

Re: [PATCH v2 4/5] powerpc: NAND: FSL UPM: document new bindings

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From: Wolfgang Grandegger <hidden>
Date: 2009-03-24 18:59:08

Scott Wood wrote:
On Thu, Mar 19, 2009 at 04:16:07PM +0100, Wolfgang Grandegger wrote:
quoted
+Optional properties:
+- fsl,upm-mar-offset : use the UPM machine address register to drive a
+  		       custom chip select logic using the specified
+		       offset.
Your example uses the name fsl,upm-mar-chip-offset instead.
I need to fix the documentation then.
quoted
+- chip-offset : address offset between chips for multi-chip support.
How is this different from fsl,upm-mar-offset?
Well, after a closer look, it's the same, hardware-wise. The offset sets
the corresponding address lines, which are used to select the chip. As
it is currently, "chip-offset" is used for:

 chip->IO_ADDR_R = chip->IO_ADDR_W =
                        fun->upm.io_addr + fun->chip_offset * chip_nr;

and "upm-mar-chip-offset" to set the address lines through the MAR
register when running the command or address patterns:

  mar += fun->upm_mar_chip_offset * fun->chip_nr;

I'm going to remove "upm_mar_chip_offset" and use "chip_offset" instead,
also for the U-Boot version. Thanks for pointing that out.

Wolfgang.
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