Re: [PATCH 1/4] NAND: FSL-UPM: add multi chip support
From: Anton Vorontsov <hidden>
Date: 2009-03-17 19:27:36
On Tue, Mar 17, 2009 at 10:12:19AM +0100, Wolfgang Grandegegr wrote:
quoted hunk ↗ jump to hunk
From: Wolfgang Grandegger <redacted> This patch adds support for multi-chip NAND devices to the FSL-UPM driver. This requires support for multiple GPIOs for the RNB pins. Signed-off-by: Wolfgang Grandegger <redacted> --- drivers/mtd/nand/fsl_upm.c | 90 +++++++++++++++++++++++++++++++++---------- 1 files changed, 69 insertions(+), 21 deletions(-)diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 7815a40..ca7e85a 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c@@ -23,6 +23,8 @@ #include <linux/io.h> #include <asm/fsl_lbc.h> +#define FSL_UPM_NAND_MAX_CHIPS 4
Is there any reason to hardcode max chips? Some obscure limit in the UPMs maybe? Otherwise we'd better allocate the rnb_gpios dynamically, depending on the num-chips property. Thanks, -- Anton Vorontsov email: cbouatmailru@gmail.com irc://irc.freenode.net/bd2