Re: [RFC][PATCH v3] powerpc: e300c2/c3/c4 TLB errata workaround

On Mar 13, 2009, at 5:06 PM, Kumar Gala wrote:

On Mar 13, 2009, at 4:26 PM, Benjamin Herrenschmidt wrote:

quoted

quoted

+BEGIN_FTR_SECTION
+	b      TlbWo    /* Code for TLB-errata workaround doesn't fit  
here */
+END_FTR_SECTION_IFSET(CPU_FTR_NEED_DTLB_SW_LRU)
+RFTlbWo:

Can you use nicer label names ? :-)

Also, that's a lot of code for such a hot path...

Cheers,
Ben.

The code needs reworking.  However, we are doing SW LRU, not sure  
how we reduce this in the hot path.

Ben, David,

Here's my attempt at reworking the code to use an SPRG, remove  
branches, optimize it down, etc.  I haven't validated that this is  
even correct.  It should be easy to replace the m{f,t}spr SPRG w/lwz/ 
stw if we want to keep the LRU state in memory instead.

Ben, do you think we can optimize this further with some random LRU  
selection?

         mtspr   SPRN_RPA,r1
         mfspr   r2,SPRN_SRR1            /* Need to restore CR0 */
         mtcrf   0x80,r2
#if 1
         li      r0,1
	mfspr	r1,SPRN_SPRG4		/* could replace w/lwz	r1,sw_way_lru@l(0) */
         rlwinm  r3,r3,19,25,29          /* Get Address bits 19:15 */
         slw     r0,r0,r3
         xor     r1,r0,r1
         srw     r0,r1,r3
	mtspr	SPRN_SPRG4,r1		/* could replace w/stw	r1,sw_way_lru@l(0) */
         rlwimi  r2,r0,31-14,14,14
#endif
         tlbld   r3
         rfi