On Jan 21, 2009, at 9:18 AM, Aaron Pace wrote:

Hello,

I'm working on a design using a Freescale MPC8572 processor.
We are using 4 gigs of memory, and also need a window of 512 megs for
PCI-E devices.
What I have done is set up the first 2G of memory from 0x0 - 0x7f, the
PCI windows from 0x8 - 0x9f, localbus devices + CCSRBAR from 0xf -
0xffffffff, and the second 2G of ram from 0x1.0000.0000 -
0x1.8000.0000.
I've got this set up in U-boot (although it only uses the low mem),
but Linux will only use the first contiguous physical area (the
message is "Only using first contiguous memory region").
Is it possible to have multiple non-contiguous physical memory chunks
used for memory allocation?
If not, is there a better way to set this up without losing large
chunks of memory?

Its possible in that Linux supports this.  However the PPC32 code does  
not exist and would need to be added to support non-contiguous memory  
ranges.

What exact PCI-E needs do you have?  Is PCI-E performance critical?   
Is (are) your pci device(s) 64-bit address capable?

I ask because depending on the answers doing straight 4G and PCI above  
that range might be sufficient for your needs.

- k