Some assembly code in head_fsl_booke.S hard-coded the size of struct tlbcam
to 20 when it indexed the TLBCAM table. Anyone changing the size of struct
tlbcam would not know to expect that.
The kernel already has a system to get the size of C structures into
assembly language files, asm-offsets, so let's use it.
The definition of the struct gets moved to a header, so that asm-offsets.c
can include it.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/kernel/asm-offsets.c | 8 ++++++++
arch/powerpc/kernel/head_fsl_booke.S | 2 +-
arch/powerpc/mm/fsl_booke_mmu.c | 8 +-------
arch/powerpc/mm/mmu_decl.h | 9 +++++++++
4 files changed, 19 insertions(+), 8 deletions(-)
This is a global variable defined in fsl_booke_mmu.c with a value that gets
initialized in assembly code in head_fsl_booke.S.
It's never used.
If some code ever does want to know the number of entries in TLB1, then
"numcams = mfspr(SPRN_TLB1CFG) & 0xfff", is a whole lot simpler than a
global initialized during kernel boot from assembly.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/kernel/head_fsl_booke.S | 4 ----
arch/powerpc/mm/fsl_booke_mmu.c | 1 -
arch/powerpc/mm/mmu_decl.h | 2 --
3 files changed, 0 insertions(+), 7 deletions(-)
The code to map lowmem uses three CAM aka TLB[1] entries to cover it. The
size of each is stored in three globals named __cam0, __cam1, and __cam2.
All the code that uses them is duplicated three times for each of the three
variables.
We have these things called arrays and loops....
Once converted to use an array, it will be easier to make the number of
CAMs configurable.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/mm/fsl_booke_mmu.c | 79 +++++++++++++++-----------------------
1 files changed, 31 insertions(+), 48 deletions(-)
On booke processors, the code that maps low memory only uses up to three
CAM entries, even though there are sixteen and nothing else uses them.
Make this number configurable in the advanced options menu along with max
low memory size. If one wants 1 GB of lowmem, then it's typically
necessary to have four CAM entries.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/Kconfig | 16 ++++++++++++++++
arch/powerpc/mm/fsl_booke_mmu.c | 6 +++++-
2 files changed, 21 insertions(+), 1 deletions(-)
@@ -696,6 +696,22 @@ config LOWMEM_SIZEhex"Maximum low memory size (in bytes)"ifLOWMEM_SIZE_BOOLdefault"0x30000000"+configLOWMEM_CAM_NUM_BOOL+bool"Set number of CAMs to use to map low memory"+depends onADVANCED_OPTIONS&&FSL_BOOKE+help+ThisoptionallowsyoutosetthemaximumnumberofCAMslotsthat+willbeusedtomaplowmemory.Therearealimitednumberofslots+availableandevenmorelimitednumberthatwillfitintheL1MMU.+However,usingmoreentrieswillallowmappingmorelowmemory.This+canbeusefulinoptimizingthelayoutofkernelvirtualmemory.++SayNhereunlessyouknowwhatyouaredoing.++configLOWMEM_CAM_NUM+int"Number of CAMs to use to map low memory"ifLOWMEM_CAM_NUM_BOOL+default3+configRELOCATABLEbool"Build a relocatable kernel (EXPERIMENTAL)"depends onEXPERIMENTAL&&ADVANCED_OPTIONS&&FLATMEM&&FSL_BOOKE
@@ -56,10 +56,14 @@externvoidloadcam_entry(unsignedintindex);unsignedinttlbcam_index;-staticunsignedlongcam[3];+staticunsignedlongcam[CONFIG_LOWMEM_CAM_NUM];#define NUM_TLBCAMS (16)+#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)+#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"+#endif+structtlbcamTLBCAM[NUM_TLBCAMS];structtlbcamrange{
The code that maps kernel low memory would only use page sizes up to 256
MB. On E500v2 pages up to 4 GB are supported.
However, a page must be aligned to a multiple of the page's size. I.e.
256 MB pages must aligned to a 256 MB boundary. This was enforced by a
requirement that the physical and virtual addresses of the start of lowmem
be aligned to 256 MB. Clearly requiring 1GB or 4GB alignment to allow
pages of that size isn't acceptable.
To solve this, I simply have adjust_total_lowmem() take alignment into
account when it decides what size pages to use. Give it PAGE_OFFSET =
0x7000_0000, PHYSICAL_START = 0x3000_0000, and 2GB of RAM, and it will map
pages like this:
PA 0x3000_0000 VA 0x7000_0000 Size 256 MB
PA 0x4000_0000 VA 0x8000_0000 Size 1 GB
PA 0x8000_0000 VA 0xC000_0000 Size 256 MB
PA 0x9000_0000 VA 0xD000_0000 Size 256 MB
PA 0xA000_0000 VA 0xE000_0000 Size 256 MB
Because the lowmem mapping code now takes alignment into account,
PHYSICAL_ALIGN can be lowered from 256 MB to 64 MB. Even lower might be
possible. The lowmem code will work down to 4 kB but it's possible some of
the boot code will fail before then. Poor alignment will force small pages
to be used, which combined with the limited number of TLB1 pages available,
will result in very little memory getting mapped. So alignments less than
64 MB probably aren't very useful anyway.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/Kconfig | 2 +-
arch/powerpc/mm/fsl_booke_mmu.c | 14 +++++++++++++-
2 files changed, 14 insertions(+), 2 deletions(-)
On Mon, 8 Dec 2008 19:34:55 -0800
Trent Piepho [off-list ref] wrote:
Some assembly code in head_fsl_booke.S hard-coded the size of struct tlbcam
to 20 when it indexed the TLBCAM table. Anyone changing the size of struct
tlbcam would not know to expect that.
The kernel already has a system to get the size of C structures into
assembly language files, asm-offsets, so let's use it.
The definition of the struct gets moved to a header, so that asm-offsets.c
can include it.
I don't mean to be overly picky, but your patch subjects and changelog
descriptions are a bit wrong. This series pertains to FSL BookE chips,
not BookE in general. There are other variants of BookE, such as 4xx.
If you could keep that in mind for future revisions, I'd appreciate
it. Something like:
[PATCH] powerpc/fsl-booke:
or something similar would be a bit more correct. Unless you really
are changing something global to all BookE processors (which is sort of
rare at the moment).
josh
From: Kumar Gala <hidden> Date: 2009-01-07 16:06:01
On Dec 8, 2008, at 9:34 PM, Trent Piepho wrote:
Some assembly code in head_fsl_booke.S hard-coded the size of struct
tlbcam
to 20 when it indexed the TLBCAM table. Anyone changing the size of
struct
tlbcam would not know to expect that.
The kernel already has a system to get the size of C structures into
assembly language files, asm-offsets, so let's use it.
The definition of the struct gets moved to a header, so that asm-
offsets.c
can include it.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/kernel/asm-offsets.c | 8 ++++++++
arch/powerpc/kernel/head_fsl_booke.S | 2 +-
arch/powerpc/mm/fsl_booke_mmu.c | 8 +-------
arch/powerpc/mm/mmu_decl.h | 9 +++++++++
4 files changed, 19 insertions(+), 8 deletions(-)
From: Kumar Gala <hidden> Date: 2009-01-07 16:07:15
On Dec 8, 2008, at 9:34 PM, Trent Piepho wrote:
This is a global variable defined in fsl_booke_mmu.c with a value
that gets
initialized in assembly code in head_fsl_booke.S.
It's never used.
If some code ever does want to know the number of entries in TLB1,
then
"numcams = mfspr(SPRN_TLB1CFG) & 0xfff", is a whole lot simpler than a
global initialized during kernel boot from assembly.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/kernel/head_fsl_booke.S | 4 ----
arch/powerpc/mm/fsl_booke_mmu.c | 1 -
arch/powerpc/mm/mmu_decl.h | 2 --
3 files changed, 0 insertions(+), 7 deletions(-)
From: Kumar Gala <hidden> Date: 2009-01-07 16:17:30
On Dec 9, 2008, at 8:26 AM, Josh Boyer wrote:
On Mon, 8 Dec 2008 19:34:55 -0800
Trent Piepho [off-list ref] wrote:
quoted
Some assembly code in head_fsl_booke.S hard-coded the size of
struct tlbcam
to 20 when it indexed the TLBCAM table. Anyone changing the size
of struct
tlbcam would not know to expect that.
The kernel already has a system to get the size of C structures into
assembly language files, asm-offsets, so let's use it.
The definition of the struct gets moved to a header, so that asm-
offsets.c
can include it.
I don't mean to be overly picky, but your patch subjects and changelog
descriptions are a bit wrong. This series pertains to FSL BookE
chips,
not BookE in general. There are other variants of BookE, such as 4xx.
If you could keep that in mind for future revisions, I'd appreciate
it. Something like:
[PATCH] powerpc/fsl-booke:
or something similar would be a bit more correct. Unless you really
are changing something global to all BookE processors (which is sort
of
rare at the moment).
From: Kumar Gala <hidden> Date: 2009-01-13 15:45:11
On Dec 8, 2008, at 9:34 PM, Trent Piepho wrote:
The code to map lowmem uses three CAM aka TLB[1] entries to cover
it. The
size of each is stored in three globals named __cam0, __cam1, and
__cam2.
All the code that uses them is duplicated three times for each of
the three
variables.
We have these things called arrays and loops....
Once converted to use an array, it will be easier to make the number
of
CAMs configurable.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/mm/fsl_booke_mmu.c | 79 ++++++++++++++
+-----------------------
1 files changed, 31 insertions(+), 48 deletions(-)
applied. Still not happy about the buf[] for output, but its minor.
- k
From: Kumar Gala <hidden> Date: 2009-01-13 15:45:17
On Dec 8, 2008, at 9:34 PM, Trent Piepho wrote:
On booke processors, the code that maps low memory only uses up to
three
CAM entries, even though there are sixteen and nothing else uses them.
Make this number configurable in the advanced options menu along
with max
low memory size. If one wants 1 GB of lowmem, then it's typically
necessary to have four CAM entries.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/Kconfig | 16 ++++++++++++++++
arch/powerpc/mm/fsl_booke_mmu.c | 6 +++++-
2 files changed, 21 insertions(+), 1 deletions(-)
From: Kumar Gala <hidden> Date: 2009-01-13 15:45:33
On Dec 8, 2008, at 9:34 PM, Trent Piepho wrote:
The code that maps kernel low memory would only use page sizes up to
256
MB. On E500v2 pages up to 4 GB are supported.
However, a page must be aligned to a multiple of the page's size.
I.e.
256 MB pages must aligned to a 256 MB boundary. This was enforced
by a
requirement that the physical and virtual addresses of the start of
lowmem
be aligned to 256 MB. Clearly requiring 1GB or 4GB alignment to allow
pages of that size isn't acceptable.
To solve this, I simply have adjust_total_lowmem() take alignment into
account when it decides what size pages to use. Give it PAGE_OFFSET =
0x7000_0000, PHYSICAL_START = 0x3000_0000, and 2GB of RAM, and it
will map
pages like this:
PA 0x3000_0000 VA 0x7000_0000 Size 256 MB
PA 0x4000_0000 VA 0x8000_0000 Size 1 GB
PA 0x8000_0000 VA 0xC000_0000 Size 256 MB
PA 0x9000_0000 VA 0xD000_0000 Size 256 MB
PA 0xA000_0000 VA 0xE000_0000 Size 256 MB
Because the lowmem mapping code now takes alignment into account,
PHYSICAL_ALIGN can be lowered from 256 MB to 64 MB. Even lower
might be
possible. The lowmem code will work down to 4 kB but it's possible
some of
the boot code will fail before then. Poor alignment will force
small pages
to be used, which combined with the limited number of TLB1 pages
available,
will result in very little memory getting mapped. So alignments
less than
64 MB probably aren't very useful anyway.
Signed-off-by: Trent Piepho <redacted>
---
arch/powerpc/Kconfig | 2 +-
arch/powerpc/mm/fsl_booke_mmu.c | 14 +++++++++++++-
2 files changed, 14 insertions(+), 2 deletions(-)