powerpc: Fix 460EX/460GT machine check handling

Those cores use the 440A type machine check (ie, they have
MCSRR0/MCSRR1). They thus need to call the appropriate fixup
function to hook the right variant of the exception.

Without this, all machine checks become fatal due to loss
of context when entering the exception handler.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

 arch/powerpc/kernel/cpu_setup_44x.S |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

--- linux-work.orig/arch/powerpc/kernel/cpu_setup_44x.S	2008-11-12 12:51:24.000000000 +1100
+++ linux-work/arch/powerpc/kernel/cpu_setup_44x.S	2008-11-12 13:01:03.000000000 +1100

@@ -34,7 +34,12 @@ _GLOBAL(__setup_cpu_440grx)
 	blr
 _GLOBAL(__setup_cpu_460ex)
 _GLOBAL(__setup_cpu_460gt)
-	b	__init_fpu_44x
+	mflr	r4
+	bl	__init_fpu_44x
+	bl	__fixup_440A_mcheck
+	mtlr	r4
+	blr
+
 _GLOBAL(__setup_cpu_440gx)
 _GLOBAL(__setup_cpu_440spe)
 	b	__fixup_440A_mcheck

On Wed, 12 Nov 2008 13:02:43 +1100
Benjamin Herrenschmidt [off-list ref] wrote:

Those cores use the 440A type machine check (ie, they have
MCSRR0/MCSRR1). They thus need to call the appropriate fixup
function to hook the right variant of the exception.

Without this, all machine checks become fatal due to loss
of context when entering the exception handler.

Looks fine to me.  However, what machine checks were you getting that
caused you to see this that aren't fatal anyway?

josh

On Wed, 2008-11-12 at 06:27 -0500, Josh Boyer wrote:

On Wed, 12 Nov 2008 13:02:43 +1100
Benjamin Herrenschmidt [off-list ref] wrote:

quoted

Those cores use the 440A type machine check (ie, they have
MCSRR0/MCSRR1). They thus need to call the appropriate fixup
function to hook the right variant of the exception.

Without this, all machine checks become fatal due to loss
of context when entering the exception handler.

Looks fine to me.  However, what machine checks were you getting that
caused you to see this that aren't fatal anyway?

PCI aborts from userspace when toying with video card POSTing &
x86emu :-)

Cheers,
Ben.