On Mon, 03 Nov 2008 08:33:16 +1100
Benjamin Herrenschmidt [off-list ref] wrote:

On Sun, 2008-11-02 at 08:41 -0500, Josh Boyer wrote:

quoted

On Sun, Nov 02, 2008 at 08:55:02AM +1100, Benjamin Herrenschmidt wrote:

quoted

On Sat, 2008-11-01 at 07:30 -0400, Josh Boyer wrote:

quoted

That is on purpose.  The chip has an errata that causes badness if
you use the last XX bytes of DRAM.  I forget exactly what XX is, but
we just remove the last page.

Doing that from the device-tree is very hairy tho... you end up with
informations in there that aren't aligned etc... oh well.

What?  -ENOTVERBOSEENOUGH.

I don't see how this is really different from U-Boot just passing in
a smaller memory size in the old arch/ppc world.  (And I think U-Boot
will actually fixup the device tree in a similar manner itself these
days.)  So if there are problems with this, please do tell.

Is it cropping the memory nodes or using the reserve map ?

Cropping the size of the memory node.  That was simplest to do from the
cuboot wrapper at the time.  If marking it reserved via a reserve map
is more elegant and correct, we could do that.

But I will still like to know what about the other way is hairy please.

josh