Re: 8600 serial support

On Thu, Oct 09, 2008 at 07:45:11AM +1100, Benjamin Herrenschmidt wrote:

Yes, it's not totally trivial and I wouldn't recommend using the weirdo
code in macserial (it does things that I don't understand how they work
with the dbdma engine).

The best way I see is to start from scratch with two different
mechanisms:

 - For Tx, that's the easiest, the fire off DMA's for outgoing chars,
maybe queue up a few descriptors to let data accumulate.

 - For Rx, one descriptor per byte. That sucks but I think that's also
what Apple does. No need to have a huge Rx buffer anyway. That gives you
precise Rx status to the byte.

I know it's not really in the scope of the discussion, but do you have
any suggestions for how we might support this with AMIC or PSC DMA where
we can't have an arbitrary number of in-flight commands? There hasn't
been a lot of traction on getting the non-PCI macs working again, but
that is something that may happen eventually. It would be nice to have
similar designs for both the descriptor based and register driven DMA
engines, but I definitely understand if you think that's not realistic.

It seems to me that an interrupt per-byte (which this design would
imply on the older DMA engines) would make the DMA less useful.

	Brad Boyer
	flar@allandria.com