Re: how to understand pci section in device tree source file

zhanglei459 wrote:

I guess  which refer to host-pci bridge ATMU,is right?

Yes.

But how to descripe
added-on pci chip,whose BAR0 and BAR1 are IO spaces, BAR2 and BAR3  are MEM
spaces.

You don't need to -- this can be probed at run-time.

-Scott