On Thu, 2008-06-26 at 17:29 +0800, Andrew Lewis wrote:

On PowerPC processors with non-coherent cache architectures the DMA
subsystem calls invalidate_dcache_range() before performing a DMA read
operation.  If the address and length of the DMA buffer are not aligned
to a cache-line boundary this can result in memory outside of the DMA
buffer being invalidated in the cache.  If this memory has an
uncommitted store then the data will be lost and a subsequent read of
that address will result in an old value being returned from main memory.

Thanks for providing a fix. The problem is old and in fact was discussed
a while ago, unfortunately, it looks like the SCSI folks didn't fix it
yet.

In theory, on non-cache coherent architecture, buffers that can be
DMA'ed should not share cache lines with other objects. This is violated
by the SCSI code due to recent changes to the way the sense buffer is
allocated. Various solutions were proposed, including a __dma_buffer
alignment directive, but back then, the wind blew more toward changing
the way the buffer is allocated in the SCSI stack.

Some people started working on that and I lost track. It looks like it
wasn't properly fixed :-(

I'll ack your patch for now as workaround, though it would be good to
have some kind of debug option to make it WARN_ON when the unaligned
case happen, to track them down and help fix them. I'll try to catch up
with the SCSI folks to see what's up on this side.

In the meantime:

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>