Thread (5 messages) 5 messages, 3 authors, 2008-05-23

Re: [PATCH v2] [POWERPC] mpic: deal with bogus NIRQ in Feature Reporting Register

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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2008-05-21 21:02:03

On Wed, 2008-05-21 at 15:59 -0500, Kumar Gala wrote:
Some chips (like the SoCs from Freescale) report the wrong value in NIRQ
and this causes issues if its doesn't match or exceed the value of
irq_count.

Add a flag that board code can set to just use irq_count instead of
FRR[NIRQ].  Eventually we'll add a device tree property with the number
of sources.

Signed-off-by: Kumar Gala <redacted>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
quoted hunk ↗ jump to hunk
---

Screw up with git on the first version.

- k

 arch/powerpc/sysdev/mpic.c |    9 ++++++---
 include/asm-powerpc/mpic.h |    2 ++
 2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8619f2a..12e285d 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1144,9 +1144,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 	mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK)
 			  >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
 	if (isu_size == 0)
-		mpic->num_sources =
-			((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
-			 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
+		if (flags & MPIC_BROKEN_FRR_NIRQS)
+			mpic->num_sources = mpic->irq_count;
+		else
+			mpic->num_sources =
+				((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
+				 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;

 	/* Map the per-CPU registers */
 	for (i = 0; i < mpic->num_cpus; i++) {
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index 943c5a3..6802570 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -353,6 +353,8 @@ struct mpic
 #define MPIC_ENABLE_MCK			0x00000200
 /* Disable bias among target selection, spread interrupts evenly */
 #define MPIC_NO_BIAS			0x00000400
+/* Ignore NIRQS as reported by FRR */
+#define MPIC_BROKEN_FRR_NIRQS		0x00000800

 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK		0xf0000000
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