Thread (33 messages) 33 messages, 7 authors, 2008-05-22

Re: [PATCH] Sam440ep support

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From: Josh Boyer <hidden>
Date: 2008-05-20 13:39:14

On Tue, 20 May 2008 07:50:28 -0500
Josh Boyer [off-list ref] wrote:
On Mon, 19 May 2008 17:20:47 +0200
Giuseppe Coviello [off-list ref] wrote:

quoted
+			usb@ef601000 {
+				compatible = "ohci-be";
+				reg = <ef601000 80>;
+				interrupts = <8 4 9 4>;
+				interrupt-parent = < &UIC1 >;
Are you sure the trigger/level settings on those interrupts is
correct?
quoted
+			};	
+		};
+
+		PCI0: pci@ec000000 {
+			device_type = "pci";
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
+			primary;
+			reg = <0 eec00000 8	/* Config space access */
+			       0 eed00000 4	/* IACK */
+			       0 eed00000 4	/* Special cycle */
+			       0 ef400000 40>;	/* Internal registers */
+
+			/* Outbound ranges, one memory and one IO,
+			 * later cannot be changed. Chip supports a second
+			 * IO range but we don't use it for now
+			 */
+			ranges = <02000000 0 a0000000 0 a0000000 0 20000000
+				  01000000 0 00000000 0 e8000000 0 00010000>;
+
+			/* Inbound 2GB range starting at 0 */
+			dma-ranges = <42000000 0 0 0 0 0 80000000>;
You have no interrupt mapping for the PCI node.  How do you have
working PCI here?
Also, if these questions result in changes to the DTS, could you please
convert it to a dts-v1 format?  Otherwise I'll have to do it myself and
it's cleaner if it comes in that way.

josh
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