RE: [PATCH 2/4] [POWERPC] Xilinx: Virtex: Enable dcr for MMIO andNATIVE

Yes, but this is a symptom of a separate problem, which is that it is
sometimes valuable to generate an optimized kernel configuration for a
particular FPGA system.  First order, I'm more concerned about getting a
kernel which is generic and can work with (more or less) any device
tree.

Steve

-----Original Message-----
From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org]
Sent: Monday, May 05, 2008 5:12 PM
To: Stephen Neuendorffer
Cc: <redacted>; <redacted>;

linuxppc-dev@ozlabs.org

Subject: Re: [PATCH 2/4] [POWERPC] Xilinx: Virtex: Enable dcr for MMIO

andNATIVE

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On Mon, 2008-05-05 at 10:56 -0700, Stephen Neuendorffer wrote:

quoted

FPGA designs may have need of both MMIO-based and NATIVE-based dcr
interfaces.

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You say _may_ ... wouldn't it be better if it was thus left to a given
virtex based platform to enable DCR_MMIO if it uses it and leave only
NATIVE by default ?
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quoted

Signed-off-by: Stephen Neuendorffer

[off-list ref]

quoted

---
 arch/powerpc/platforms/40x/Kconfig |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/40x/Kconfig

b/arch/powerpc/platforms/40x/Kconfig

quoted

index a9260e2..b8e06df 100644

--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig

@@ -123,6 +123,8 @@ config 405GPR

 config XILINX_VIRTEX
 	bool
+	select PPC_DCR_MMIO
+	select PPC_DCR_NATIVE

 config XILINX_VIRTEX_II_PRO
 	bool

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